mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
bb10587376
Summary: When doing the conversion: MachineInst -> MCInst, we should ignore the implicit operands, it will expose more opportunity for InstiAlias. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D77118
38 lines
1.2 KiB
LLVM
38 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
|
|
; RUN: -mcpu=pwr9 | FileCheck %s
|
|
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown \
|
|
; RUN: -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefix=NO-ALTIVEC
|
|
|
|
declare i64 @llvm.bswap.i64(i64)
|
|
|
|
define i64 @bswap64(i64 %x) {
|
|
; CHECK-LABEL: bswap64:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: mtvsrdd 34, 3, 3
|
|
; CHECK-NEXT: xxbrd 0, 34
|
|
; CHECK-NEXT: mffprd 3, 0
|
|
; CHECK-NEXT: blr
|
|
;
|
|
; NO-ALTIVEC-LABEL: bswap64:
|
|
; NO-ALTIVEC: # %bb.0: # %entry
|
|
; NO-ALTIVEC-NEXT: rotldi 5, 3, 16
|
|
; NO-ALTIVEC-NEXT: rotldi 4, 3, 8
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 5, 8, 48
|
|
; NO-ALTIVEC-NEXT: rotldi 5, 3, 24
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 5, 16, 40
|
|
; NO-ALTIVEC-NEXT: rotldi 5, 3, 32
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 5, 24, 32
|
|
; NO-ALTIVEC-NEXT: rotldi 5, 3, 48
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 5, 40, 16
|
|
; NO-ALTIVEC-NEXT: rotldi 5, 3, 56
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 5, 48, 8
|
|
; NO-ALTIVEC-NEXT: rldimi 4, 3, 56, 0
|
|
; NO-ALTIVEC-NEXT: mr 3, 4
|
|
; NO-ALTIVEC-NEXT: blr
|
|
entry:
|
|
%0 = call i64 @llvm.bswap.i64(i64 %x)
|
|
ret i64 %0
|
|
}
|
|
|