1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
llvm-mirror/test/MC/VE/FADD.s
Kazushi (Jam) Marukawa 867b3896d5 [VE] Support floating-point arithmetic instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
floating-point arithmetic instructions.  Add FADDQ, FSUBQ, FMULQ, and
FCMPQ instructions and F128 register class too.

Differential Revision: https://reviews.llvm.org/D81386
2020-06-08 15:58:57 +02:00

25 lines
898 B
ArmAsm

# RUN: llvm-mc -triple=ve --show-encoding < %s \
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
# CHECK-INST: fadd.d %s11, %s20, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x94,0x0b,0x4c]
fadd.d %s11, %s20, %s22
# CHECK-INST: fadd.s %s11, 22, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x16,0x8b,0x4c]
fadd.s %s11, 22, %s22
# CHECK-INST: fadd.d %s11, 63, (60)1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x3c,0x3f,0x0b,0x4c]
fadd.d %s11, 63, (60)1
# CHECK-INST: fadd.s %s11, -64, (22)0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x56,0x40,0x8b,0x4c]
fadd.s %s11, -64, (22)0
# CHECK-INST: fadd.q %s12, %s20, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x94,0x0c,0x6c]
fadd.q %s12, %s20, %s22