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6c0d11e970
Added patterns to implement `select i1 %p, <vty> %a, <vty> %b` Reviewed By: efriedma Tags: #llvm Differential Revision: https://reviews.llvm.org/D79356
135 lines
5.1 KiB
LLVM
135 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s
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define <vscale x 16 x i8> @select_nxv16i8(i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
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; CHECK-LABEL: select_nxv16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.b, xzr, x8
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; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b
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ret <vscale x 16 x i8> %res
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}
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define <vscale x 8 x i16> @select_nxv8i16(i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
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; CHECK-LABEL: select_nxv8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.h, xzr, x8
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; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 4 x i32> @select_nxv4i32(i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: select_nxv4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.s, xzr, x8
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; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 2 x i64> @select_nxv2i64(i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: select_nxv2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.d, xzr, x8
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; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b
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ret <vscale x 2 x i64> %res
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}
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define <vscale x 8 x half> @select_nxv8f16(i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
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; CHECK-LABEL: select_nxv8f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.h, xzr, x8
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; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b
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ret <vscale x 8 x half> %res
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}
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define <vscale x 4 x float> @select_nxv4f32(i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
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; CHECK-LABEL: select_nxv4f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.s, xzr, x8
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; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b
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ret <vscale x 4 x float> %res
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}
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define <vscale x 2 x double> @select_nxv2f64(i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
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; CHECK-LABEL: select_nxv2f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p0.d, xzr, x8
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; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b
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ret <vscale x 2 x double> %res
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}
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define <vscale x 16 x i1> @select_nxv16i1(i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
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; CHECK-LABEL: select_nxv16i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p2.b, xzr, x8
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; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b
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ret <vscale x 16 x i1> %res
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}
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define <vscale x 8 x i1> @select_nxv8i1(i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
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; CHECK-LABEL: select_nxv8i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p2.h, xzr, x8
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; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b
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ret <vscale x 8 x i1> %res
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}
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define <vscale x 4 x i1> @select_nxv4i1(i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
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; CHECK-LABEL: select_nxv4i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p2.s, xzr, x8
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; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b
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ret <vscale x 4 x i1> %res
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}
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define <vscale x 2 x i1> @select_nxv2i1(i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
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; CHECK-LABEL: select_nxv2i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-NEXT: sbfx x8, x0, #0, #1
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; CHECK-NEXT: whilelo p2.d, xzr, x8
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; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
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; CHECK-NEXT: ret
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%res = select i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b
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ret <vscale x 2 x i1> %res
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}
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