1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/lib
Sam Kolton 6e32c9563b [AMDGPU] SDWA operands should not intersect with potential MIs
Summary:
There should be no intesection between SDWA operands and potential MIs. E.g.:
```
v_and_b32 v0, 0xff, v1 -> src:v1 sel:BYTE_0
v_and_b32 v2, 0xff, v0 -> src:v0 sel:BYTE_0
v_add_u32 v3, v4, v2
```
In that example it is possible that we would fold 2nd instruction into 3rd (v_add_u32_sdwa) and then try to fold 1st instruction into 2nd (that was already destroyed). So if SDWAOperand is also a potential MI then do not apply it.

Reviewers: vpykhtin, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D32804

llvm-svn: 303347
2017-05-18 12:12:03 +00:00
..
Analysis [SCEV][NFC] Remove duplication of isLoopInvariant code 2017-05-18 08:26:41 +00:00
AsmParser [IR] Allow attributes with global variables 2017-05-11 12:28:08 +00:00
Bitcode [MetadataLoader] Remove unused Vector. NFCI. 2017-05-16 18:41:46 +00:00
CodeGen Re-commit: [globalisel][tablegen] Import rules containing intrinsic_wo_chain. 2017-05-18 10:33:36 +00:00
DebugInfo [DWARF] - Simplify RelocVisitor implementation. 2017-05-18 08:25:11 +00:00
Demangle
ExecutionEngine [RuntimeDyld] Fix debug section relocation (pr20457) 2017-05-17 08:47:28 +00:00
Fuzzer [libFuzzer] fix tests on Windows 2017-05-15 22:55:00 +00:00
IR [MVT] add v1i1 MVT 2017-05-18 11:29:41 +00:00
IRReader
LineEditor
Linker [ThinLTO] Do not assert when adding a module with a different but 2017-05-18 03:52:29 +00:00
LTO [ThinLTO] Do not assert when adding a module with a different but 2017-05-18 03:52:29 +00:00
MC MCObjectStreamer : fail with a diagnostic when emitting an out of range value. 2017-05-15 08:43:27 +00:00
Object [lib/Object] - Minor API update for llvm::Decompressor. 2017-05-18 08:00:01 +00:00
ObjectYAML [WebAssembly] Fix build error in wasm YAML code 2017-05-10 00:14:04 +00:00
Option ArgList: cache index ranges containing arguments with each ID 2017-04-12 23:19:51 +00:00
Passes [PM] Add ProfileSummaryAnalysis as a required pass in the new pipeline. 2017-05-04 16:58:45 +00:00
ProfileData Change sample profile writer to make it deterministic. 2017-05-11 23:43:44 +00:00
Support [ThinLTO] Do not assert when adding a module with a different but 2017-05-18 03:52:29 +00:00
TableGen
Target [AMDGPU] SDWA operands should not intersect with potential MIs 2017-05-18 12:12:03 +00:00
ToolDrivers Add missing files 2017-05-13 22:10:13 +00:00
Transforms [Statistics] Add a method to atomically update a statistic that contains a maximum 2017-05-18 00:51:39 +00:00
XRay [XRay][lib] Support and temporarily skip over CustomEvent records 2017-05-12 01:06:41 +00:00
CMakeLists.txt Move lib/LibDriver -> lib/ToolDrivers/llvm-lib. NFCI. 2017-05-13 22:06:46 +00:00
LLVMBuild.txt Move lib/LibDriver -> lib/ToolDrivers/llvm-lib. NFCI. 2017-05-13 22:06:46 +00:00