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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
llvm-mirror/test/CodeGen
2015-10-25 11:55:10 +00:00
..
AArch64 Revert "[AArch64]Merge halfword loads into a 32-bit load" 2015-10-23 10:41:38 +00:00
AMDGPU AMDGPU: Fix verifier error in SIFoldOperands 2015-10-21 22:37:50 +00:00
ARM [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee saved registers 2015-10-23 17:17:59 +00:00
BPF [bpf] Do not expand UNDEF SDNode during insn selection lowering 2015-10-08 18:52:40 +00:00
CPP
Generic [Hexagon] Reverting test file change. 2015-10-17 01:58:51 +00:00
Hexagon Tail duplication can mix incompatible registers in phi nodes 2015-10-21 02:40:06 +00:00
Inputs
Mips [mips][mips16] Fix typo in FileCheck directive. 2015-10-22 14:01:52 +00:00
MIR [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. 2015-10-15 14:34:23 +00:00
MSP430
NVPTX
PowerPC [MachO] Stop generating *coal* sections. 2015-10-15 05:28:38 +00:00
SPARC Drop assert that a call with struct return goes to a function with sret 2015-10-21 20:05:01 +00:00
SystemZ Let MachineVerifier be aware of mem-to-mem instructions. 2015-10-21 07:39:47 +00:00
Thumb
Thumb2 [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev 2015-10-23 17:19:19 +00:00
WebAssembly WebAssembly: fix more syntax 2015-10-22 02:32:50 +00:00
WinEH [WinEH] Fix eh.exceptionpointer intrinsic lowering 2015-10-17 00:08:08 +00:00
X86 [X86] PMOV*X* tests - remove unnecessary mcpu arguments and regenerate 2015-10-25 11:55:10 +00:00
XCore