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5fe7f3e187
Trace through multiple COPYs when looking for a physreg source. Add hinting for vregs that will be copied into physregs (we only hinted for vregs getting copied to a physreg previously). Give hinted a register a bonus when deciding which value to spill. This is part of my rewrite regallocfast series. In fact this one doesn't even have an effect unless you also flip the allocation to happen from back to front of a basic block. Nonetheless it helps to split this up to ease review of D52010 Patch by Matthias Braun llvm-svn: 360887
88 lines
3.3 KiB
LLVM
88 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -fast-isel-sink-local-values < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
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define i32 @_Z3foov() {
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; CHECK-LABEL: _Z3foov:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 20
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; CHECK-NEXT: movw $10959, {{[0-9]+}}(%esp) # imm = 0x2ACF
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; CHECK-NEXT: movw $-15498, {{[0-9]+}}(%esp) # imm = 0xC376
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; CHECK-NEXT: movw $19417, {{[0-9]+}}(%esp) # imm = 0x4BD9
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cmpw $0, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movb $1, %cl
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; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
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; CHECK-NEXT: jne .LBB0_2
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; CHECK-NEXT: # %bb.1: # %lor.rhs
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
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; CHECK-NEXT: jmp .LBB0_2
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; CHECK-NEXT: .LBB0_2: # %lor.end
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; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movzbl %al, %ecx
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
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; CHECK-NEXT: cmpl %ecx, %edx
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; CHECK-NEXT: setl %al
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movzbl %al, %ecx
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; CHECK-NEXT: xorl $-1, %ecx
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; CHECK-NEXT: cmpl $0, %ecx
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
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; CHECK-NEXT: jne .LBB0_4
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; CHECK-NEXT: # %bb.3: # %lor.rhs4
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
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; CHECK-NEXT: jmp .LBB0_4
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; CHECK-NEXT: .LBB0_4: # %lor.end5
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; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Reload
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movzbl %al, %ecx
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; CHECK-NEXT: # kill: def $cx killed $cx killed $ecx
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; CHECK-NEXT: movw %cx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: addl $16, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: retl
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entry:
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%aa = alloca i16, align 2
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%bb = alloca i16, align 2
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%cc = alloca i16, align 2
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store i16 10959, i16* %aa, align 2
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store i16 -15498, i16* %bb, align 2
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store i16 19417, i16* %cc, align 2
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%0 = load i16, i16* %aa, align 2
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%conv = zext i16 %0 to i32
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%1 = load i16, i16* %cc, align 2
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%tobool = icmp ne i16 %1, 0
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br i1 %tobool, label %lor.end, label %lor.rhs
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lor.rhs: ; preds = %entry
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br label %lor.end
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lor.end: ; preds = %lor.rhs, %entry
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%2 = phi i1 [ true, %entry ], [ false, %lor.rhs ]
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%conv1 = zext i1 %2 to i32
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%cmp = icmp slt i32 %conv, %conv1
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%conv2 = zext i1 %cmp to i32
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%neg = xor i32 %conv2, -1
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%tobool3 = icmp ne i32 %neg, 0
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br i1 %tobool3, label %lor.end5, label %lor.rhs4
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lor.rhs4: ; preds = %lor.end
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br label %lor.end5
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lor.end5: ; preds = %lor.rhs4, %lor.end
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%3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs4 ]
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%conv6 = zext i1 %3 to i16
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store i16 %conv6, i16* %bb, align 2
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%4 = load i16, i16* %bb, align 2
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%conv7 = zext i16 %4 to i32
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ret i32 %conv7
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}
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