Tim Northover 68c567a38a IR: add a second ordering operand to cmpxhg for failure ... The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 llvm-svn: 203559		2014-03-11 10:48:52 +00:00
..
X86	[msan] A no-op implementation of VarArg handling.	2013-05-21 12:27:47 +00:00
atomics.ll	IR: add a second ordering operand to cmpxhg for failure	2014-03-11 10:48:52 +00:00
check_access_address.ll	Use multiple filecheck prefixes in msan instrumentation tests.	2013-11-21 11:37:16 +00:00
msan_basic.ll	[msan] Propagate condition origin in select instruction.	2013-11-21 12:00:24 +00:00
return_from_main.ll	[msan] Check return value of main().	2013-09-16 13:24:32 +00:00
unreachable.ll	Fix llvm::removeUnreachableBlocks to handle unreachable loops.	2013-03-22 08:43:04 +00:00
vector_cvt.ll	[msan] Instrument x86.*_cvt* intrinsics.	2013-10-14 15:16:25 +00:00
vector_shift.ll	[msan] Handle X86 SIMD bitshift intrinsics.	2014-03-03 13:47:42 +00:00
wrap_indirect_calls.ll	Add an explicit insert point argument to SplitBlockAndInsertIfThen.	2013-12-19 13:29:56 +00:00