David Green fbd8392aec [ARM] Fix loads and stores for predicate vectors ... These predicate vectors can usually be loaded and stored with a single instruction, a VSTR_P0. However this instruction will store the entire P0 predicate, 16 bits, zeroextended to 32bits. Each lane of the the v4i1/v8i1/v16i1 representing 4/2/1 bits. As far as I understand, when llvm says "store this v4i1", it really does need to store 4 bits (or 8, that being the size of a byte, with this bottom 4 as the interesting bits). For example a bitcast from a v8i1 to a i8 is defined as a store followed by a load, which is how the code is expanded. So this instead lowers the v4i1/v8i1 load/store through some shuffles to get the bits into the correct positions. This, as you might imagine, is not as efficient as a single instruction. But I believe it is needed for correctness. v16i1 equally should not load/store 32bits, only storing the 16bits of data. Stack loads/stores are still using the VSTR_P0 (as can be seen by the test not changing). This is fine as they are self-consistent, it is only "externally observable loads/stores" (from our point of view) that need to be corrected. Differential revision: https://reviews.llvm.org/D67085 llvm-svn: 371419		2019-09-09 16:35:49 +00:00
..
LowOverheadLoops	[ARM] MVE Tail Predication	2019-09-06 08:24:41 +00:00
2009-07-17-CrossRegClassCopy.ll
2009-07-21-ISelBug.ll
2009-07-23-CPIslandBug.ll
2009-07-30-PEICrash.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-08-01-WrongLDRBOpc.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-08-02-CoalescerBug.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-08-04-CoalescerAssert.ll
2009-08-04-CoalescerBug.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-08-04-ScavengerAssert.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-08-04-SubregLoweringBug2.ll
2009-08-04-SubregLoweringBug3.ll
2009-08-04-SubregLoweringBug.ll
2009-08-06-SpDecBug.ll
2009-08-07-CoalescerBug.ll
2009-08-07-NeonFPBug.ll
2009-08-08-ScavengerAssert.ll
2009-08-10-ISelBug.ll
2009-08-21-PostRAKill4.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-09-01-PostRAProlog.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-10-15-ITBlockBranch.ll
2009-11-01-CopyReg2RegBug.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2009-11-11-ScavengerAssert.ll
2009-11-13-STRDBug.ll
2009-12-01-LoopIVUsers.ll
2010-01-06-TailDuplicateLabels.ll
2010-01-19-RemovePredicates.ll
2010-02-11-phi-cycle.ll
2010-02-24-BigStack.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2010-03-08-addi12-ccout.ll
2010-03-15-AsmCCClobber.ll	[DAGCombiner] improve throughput of shift+logic+shift	2019-09-01 18:38:15 +00:00
2010-04-15-DynAllocBug.ll	[ARM] Run ARMParallelDSP in the IRPasses phase	2019-03-14 10:57:40 +00:00
2010-04-26-CopyRegCrash.ll
2010-05-24-rsbs.ll
2010-06-14-NEONCoalescer.ll
2010-06-19-ITBlockCrash.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2010-06-21-TailMergeBug.ll	[ARM] Remove EarlyCSE from backend	2019-03-15 13:36:37 +00:00
2010-08-10-VarSizedAllocaBug.ll
2010-11-22-EpilogueBug.ll
2010-12-03-AddSPNarrowing.ll
2011-04-21-FILoweringBug.ll
2011-06-07-TwoAddrEarlyClobber.ll
2011-12-16-T2SizeReduceAssert.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2012-01-13-CBNZBug.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
2013-02-19-tail-call-register-hint.ll
2013-03-02-vduplane-nonconstant-source-index.ll
2013-03-06-vector-sext-operand-scalarize.ll
aapcs.ll	[ARM] Replace fp-only-sp and d16 with fp64 and d32.	2019-05-28 16:13:20 +00:00
aligned-constants.ll
aligned-spill.ll
bfi.ll
bfx.ll
bicbfi.ll
buildvector-crash.ll
carry.ll
cbnz.ll
cmp-frame.ll
constant-hoisting.ll	[DAG] Refactor DAGCombiner::ReassociateOps	2019-04-29 17:50:10 +00:00
constant-islands-cbz.ll	[ARM] Search backwards for CMP when combining into CBZ	2019-03-17 16:11:22 +00:00
constant-islands-cbz.mir	[ARM] Check that CPSR does not have other uses	2019-03-17 21:36:15 +00:00
constant-islands-jump-table.ll
constant-islands-new-island-padding.ll
constant-islands-new-island.ll
constant-islands.ll
cortex-fp.ll
crash.ll
cross-rc-coalescing-1.ll
cross-rc-coalescing-2.ll	[DAG] Move integer setcc %x, %x folding into FoldSetCC	2019-03-13 11:08:57 +00:00
csel.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
div.ll
emit-unwinding.ll
float-cmp.ll
float-intrinsics-double.ll	[ARM] Replace fp-only-sp and d16 with fp64 and d32.	2019-05-28 16:13:20 +00:00
float-intrinsics-float.ll	[ARM] Replace fp-only-sp and d16 with fp64 and d32.	2019-05-28 16:13:20 +00:00
float-ops.ll	[ARM] Stop using scalar FP instructions in integer-only MVE mode.	2019-07-02 11:26:00 +00:00
frame-pointer.ll
frameless2.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
frameless.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
high-reg-spill.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
ifcvt-cbz.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
ifcvt-compare.ll
ifcvt-minsize.ll	[ARM] Don't replicate instructions in Ifcvt at minsize	2019-04-23 11:46:58 +00:00
ifcvt-neon-deprecated.mir
ifcvt-no-branch-predictor.ll	[ARM] Cortex-M4 schedule	2019-05-15 12:41:58 +00:00
ifcvt-rescan-bug-2016-08-22.ll
ifcvt-rescan-diamonds.ll
inflate-regs.ll
inline-asm-i-constraint-i1.ll	[TargetLowering] Extend bool args to inline-asm according to getBooleanType	2019-05-22 16:16:15 +00:00
inlineasm-error-t-toofewregs-mve.ll	[ARM] Support inline assembler constraints for MVE.	2019-06-25 16:49:32 +00:00
inlineasm-mve.ll	[ARM] Support inline assembler constraints for MVE.	2019-06-25 16:49:32 +00:00
inlineasm.ll
intrinsics-cc.ll
intrinsics-coprocessor.ll
large-call.ll
large-stack.ll
ldr-str-imm12.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
lit.local.cfg	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
longMACt.ll
lsr-deficiency.ll
m4-sched-ldr.mir	[ARM] Cortex-M4 schedule	2019-05-15 12:41:58 +00:00
m4-sched-regs.ll	[ARM] Don't use the Machine Scheduler for cortex-m at minsize	2019-05-15 12:58:02 +00:00
machine-licm.ll	Replace "no-frame-pointer-*" function attributes with "frame-pointer"	2019-01-14 10:55:55 +00:00
mul_const.ll
mve-abs.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-basic.ll	[ARM] MVE loads and stores	2019-06-28 08:41:40 +00:00
mve-be.ll	[ARM] MVE big endian loads/stores	2019-08-08 15:15:19 +00:00
mve-bitarith.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-bitcasts.ll	[ARM] MVE vector shuffles	2019-06-28 07:08:42 +00:00
mve-ctpop.ll	[ARM] Expand CTPOP intrinsic for MVE	2019-08-07 15:47:45 +00:00
mve-div-expand.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-fmas.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-fmath.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-fp-negabs.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-frint.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-ldst-offset.ll	[ARM] Fix MVE ldst offset ranges	2019-09-03 09:57:02 +00:00
mve-ldst-postinc.ll	[ARM] More MVE load/store tests for offsets around the negative limit. NFC	2019-09-03 09:42:16 +00:00
mve-ldst-preinc.ll	[ARM] More MVE load/store tests for offsets around the negative limit. NFC	2019-09-03 09:42:16 +00:00
mve-ldst-regimm.ll	[ARM] Add support for MVE pre and post inc loads and stores	2019-08-08 15:27:58 +00:00
mve-loadstore.ll	[ARM] Fix MVE ldst offset ranges	2019-09-03 09:57:02 +00:00
mve-masked-ldst.ll	[ARM] Fix loads and stores for predicate vectors	2019-09-09 16:35:49 +00:00
mve-masked-load.ll	[ARM] Fix loads and stores for predicate vectors	2019-09-09 16:35:49 +00:00
mve-masked-store.ll	[ARM] Fix loads and stores for predicate vectors	2019-09-09 16:35:49 +00:00
mve-minmax.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-neg.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-nofloat.ll	[ARM] Add test for MVE and no floats. NFC	2019-07-09 14:43:17 +00:00
mve-phireg.ll	[ARM] Use MQPR not QPR for MVE registers	2019-09-02 17:18:23 +00:00
mve-pred-and.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-pred-bitcast.ll	[ARM] Fix loads and stores for predicate vectors	2019-09-09 16:35:49 +00:00
mve-pred-build-const.ll	[ARM] MVE predicate register support	2019-07-24 11:51:36 +00:00
mve-pred-build-var.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-pred-ext.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-pred-loadstore.ll	[ARM] Fix loads and stores for predicate vectors	2019-09-09 16:35:49 +00:00
mve-pred-not.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-pred-or.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-pred-shuffle.ll	[ARM] MVE predicate register support	2019-07-24 11:51:36 +00:00
mve-pred-spill.ll	[ARM] MVE big endian loads/stores	2019-08-08 15:15:19 +00:00
mve-pred-xor.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-sext.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-shifts.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-shuffle.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-simple-arith.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-soft-float-abi.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-stack.ll	[ARM] Correct register for narrowing and widening MVE loads and stores.	2019-08-16 13:42:39 +00:00
mve-vaddqr.ll	[ARM] Add patterns for VADD with q and r registers	2019-09-06 17:02:35 +00:00
mve-vaddv.ll	Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32	2019-08-22 10:29:20 +00:00
mve-vcmp.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vcmpf.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vcmpfr.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vcmpfz.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vcmpr.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vcmpz.ll	[ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands	2019-09-03 11:30:54 +00:00
mve-vctp.ll	[ARM][MVE] VCTP instruction selection	2019-09-09 12:54:47 +00:00
mve-vcvt.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-vdup.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-vector-spill.ll	[ARM] MVE spill vector test. NFC	2019-08-11 09:12:57 +00:00
mve-vfma.ll	[MVE] VMOVX patterns	2019-08-28 10:13:23 +00:00
mve-vhaddsub.ll	[ARM] Generate MVE VHADDs/VHSUBs	2019-08-07 10:26:57 +00:00
mve-vmla.ll	[ARM] Sink add/mul(shufflevector(insertelement())) for MVE instruction selection	2019-09-06 16:01:32 +00:00
mve-vmovimm.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-vmulqr.ll	[ARM] Add patterns for VMUL with q and r registers	2019-09-06 17:02:21 +00:00
mve-vmvnimm.ll	[ARM] MVE vector for 64bit types	2019-07-15 18:42:54 +00:00
mve-vpsel.ll	[ARM] MVE predicate bitcast test and VPSEL adjustment. NFC	2019-09-02 19:03:35 +00:00
mve-vpt-block2.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block3.mir	[ARM] Masked load and store and predicate tests. NFC	2019-08-29 10:32:12 +00:00
mve-vpt-block4.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block5.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block6.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block7.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block8.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-block.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vpt-nots.mir	[ARM] Fixup the creation of VPT blocks	2019-09-05 13:37:04 +00:00
mve-vsubqr.ll	[ARM] Add patterns for VSUB with q and r registers	2019-09-06 17:02:42 +00:00
mve-widen-narrow.ll	[ARM] MVE big endian loads/stores	2019-08-08 15:15:19 +00:00
peephole-addsub.mir	[ARM] Ensure we update the correct flags in the peephole optimiser	2019-02-14 11:09:24 +00:00
peephole-cmp.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
pic-load.ll
segmented-stacks.ll
setjmp_longjmp.ll
stack_guard_remat.ll
t2-teq-reduce.mir	[ARM] Size reduce teq to eors	2019-01-10 08:36:33 +00:00
t2sizereduction.mir	[ARM] Replace fp-only-sp and d16 with fp64 and d32.	2019-05-28 16:13:20 +00:00
tail-call-r9.ll
tbb-removeadd.mir
thumb2-adc.ll
thumb2-add2.ll
thumb2-add3.ll
thumb2-add4.ll
thumb2-add5.ll
thumb2-add6.ll
thumb2-add.ll
thumb2-and2.ll
thumb2-and.ll
thumb2-asr2.ll
thumb2-asr.ll
thumb2-bcc.ll
thumb2-bfc.ll
thumb2-bic.ll
thumb2-branch.ll
thumb2-call-tc.ll
thumb2-call.ll
thumb2-cbnz.ll
thumb2-clz.ll
thumb2-cmn2.ll
thumb2-cmn.ll
thumb2-cmp.ll
thumb2-cpsr-liveness.ll
thumb2-eor2.ll
thumb2-eor.ll
thumb2-ifcvt1-tc.ll
thumb2-ifcvt1.ll
thumb2-ifcvt2.ll
thumb2-ifcvt3.ll
thumb2-jtb.ll
thumb2-ldm.ll
thumb2-ldr_ext.ll
thumb2-ldr_post.ll
thumb2-ldr_pre.ll	[NFC][Thumb2] Autogenerate thumb2-ldr_pre.ll test	2019-05-21 21:49:05 +00:00
thumb2-ldr.ll
thumb2-ldrb.ll
thumb2-ldrd.ll
thumb2-ldrh.ll
thumb2-lsl2.ll
thumb2-lsl.ll
thumb2-lsr2.ll
thumb2-lsr3.ll
thumb2-lsr.ll
thumb2-mla.ll
thumb2-mls.ll
thumb2-mov.ll
thumb2-mul.ll
thumb2-mulhi.ll
thumb2-mvn2.ll
thumb2-mvn.ll
thumb2-neg.ll
thumb2-orn2.ll
thumb2-orn.ll
thumb2-orr2.ll
thumb2-orr.ll
thumb2-pack.ll
thumb2-rev16.ll
thumb2-rev.ll
thumb2-ror.ll
thumb2-rsb2.ll
thumb2-rsb.ll
thumb2-sbc.ll
thumb2-select_xform.ll
thumb2-select.ll
thumb2-shifter.ll
thumb2-smla.ll
thumb2-smul.ll
thumb2-spill-q.ll
thumb2-str_post.ll
thumb2-str_pre.ll
thumb2-str.ll
thumb2-strb.ll
thumb2-strh.ll
thumb2-sub2.ll
thumb2-sub3.ll
thumb2-sub4.ll
thumb2-sub5.ll
thumb2-sub.ll
thumb2-sxt_rot.ll
thumb2-sxt-uxt.ll
thumb2-tbb.ll
thumb2-tbh.ll
thumb2-teq2.ll	[ARM] Size reduce teq to eors	2019-01-10 08:36:33 +00:00
thumb2-teq.ll
thumb2-tst2.ll
thumb2-tst.ll
thumb2-uxt_rot.ll
thumb2-uxtb.ll	Regenerate UXTB tests	2019-07-27 18:44:15 +00:00
tls1.ll
tls2.ll
tpsoft.ll	[llvm-readobj] Change -long-option to --long-option in tests. NFC	2019-05-01 05:27:20 +00:00
umulo-64-legalisation-lowering.ll	[SchedModel] Fix for read advance cycles with implicit pseudo operands.	2018-10-30 15:04:40 +00:00
umulo-128-legalisation-lowering.ll	[ARM] Add missing memory operands to a bunch of instructions.	2019-03-25 22:42:30 +00:00
unreachable-large-offset-gep.ll
v8_deprecate_IT.ll	[ARM] Comply with rules on ARMv8-A thumb mode partial deprecation of IT.	2019-06-18 20:55:09 +00:00
v8_IT_1.ll
v8_IT_2.ll
v8_IT_3.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
v8_IT_4.ll
v8_IT_5.ll
v8_IT_6.ll