mirror of
https://github.com/RPCS3/llvm-mirror.git
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81afdbc83c
This patch adds support for the next-generation arch14 CPU architecture to the SystemZ backend. This includes: - Basic support for the new processor and its features. - Detection of arch14 as host processor. - Assembler/disassembler support for new instructions. - New LLVM intrinsics for certain new instructions. - Support for low-level builtins mapped to new LLVM intrinsics. - New high-level intrinsics in vecintrin.h. - Indicate support by defining __VEC__ == 10304. Note: No currently available Z system supports the arch14 architecture. Once new systems become available, the official system name will be added as supported -march name.
520 lines
18 KiB
C++
520 lines
18 KiB
C++
//========- unittests/Support/Host.cpp - Host.cpp tests --------------========//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Support/Host.h"
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#include "llvm/Config/llvm-config.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/FileSystem.h"
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#include "llvm/Support/Path.h"
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#include "llvm/Support/Program.h"
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#include "llvm/Support/Threading.h"
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#include "gtest/gtest.h"
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#define ASSERT_NO_ERROR(x) \
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if (std::error_code ASSERT_NO_ERROR_ec = x) { \
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SmallString<128> MessageStorage; \
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raw_svector_ostream Message(MessageStorage); \
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Message << #x ": did not return errc::success.\n" \
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<< "error number: " << ASSERT_NO_ERROR_ec.value() << "\n" \
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<< "error message: " << ASSERT_NO_ERROR_ec.message() << "\n"; \
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GTEST_FATAL_FAILURE_(MessageStorage.c_str()); \
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} else { \
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}
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using namespace llvm;
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class HostTest : public testing::Test {
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Triple Host;
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protected:
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bool isSupportedArchAndOS() {
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// Initially this is only testing detection of the number of
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// physical cores, which is currently only supported/tested on
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// some systems.
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return (Host.isOSWindows() && llvm_is_multithreaded()) ||
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Host.isOSDarwin() || (Host.isX86() && Host.isOSLinux()) ||
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(Host.isPPC64() && Host.isOSLinux()) ||
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(Host.isSystemZ() && (Host.isOSLinux() || Host.isOSzOS()));
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}
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HostTest() : Host(Triple::normalize(sys::getProcessTriple())) {}
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};
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TEST_F(HostTest, NumPhysicalCores) {
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int Num = sys::getHostNumPhysicalCores();
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if (isSupportedArchAndOS())
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ASSERT_GT(Num, 0);
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else
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ASSERT_EQ(Num, -1);
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}
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TEST(getLinuxHostCPUName, ARM) {
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StringRef CortexA9ProcCpuinfo = R"(
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processor : 0
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model name : ARMv7 Processor rev 10 (v7l)
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BogoMIPS : 1393.66
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Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
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CPU implementer : 0x41
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CPU architecture: 7
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CPU variant : 0x2
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CPU part : 0xc09
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CPU revision : 10
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processor : 1
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model name : ARMv7 Processor rev 10 (v7l)
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BogoMIPS : 1393.66
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Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
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CPU implementer : 0x41
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CPU architecture: 7
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CPU variant : 0x2
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CPU part : 0xc09
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CPU revision : 10
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Hardware : Generic OMAP4 (Flattened Device Tree)
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Revision : 0000
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Serial : 0000000000000000
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(CortexA9ProcCpuinfo),
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"cortex-a9");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xc0f"),
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"cortex-a15");
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// Verify that both CPU implementer and CPU part are checked:
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n"
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"CPU part : 0xc0f"),
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"generic");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x06f"),
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"krait");
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}
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TEST(getLinuxHostCPUName, AArch64) {
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd03"),
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"cortex-a53");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd0c"),
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"neoverse-n1");
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// Verify that both CPU implementer and CPU part are checked:
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n"
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"CPU part : 0xd03"),
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"generic");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x201"),
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"kryo");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x800"),
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"cortex-a73");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x801"),
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"cortex-a73");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0xc00"),
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"falkor");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0xc01"),
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"saphira");
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// MSM8992/4 weirdness
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StringRef MSM8992ProcCpuInfo = R"(
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Processor : AArch64 Processor rev 3 (aarch64)
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processor : 0
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processor : 1
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processor : 2
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processor : 3
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processor : 4
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processor : 5
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0xd03
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CPU revision : 3
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Hardware : Qualcomm Technologies, Inc MSM8992
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(MSM8992ProcCpuInfo),
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"cortex-a53");
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// Exynos big.LITTLE weirdness
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const std::string ExynosProcCpuInfo = R"(
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processor : 0
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0xd05
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processor : 1
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x53
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CPU architecture: 8
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)";
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// Verify default for Exynos.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0xc\n"
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"CPU part : 0xafe"),
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"exynos-m3");
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// Verify Exynos M3.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0x1\n"
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"CPU part : 0x002"),
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"exynos-m3");
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// Verify Exynos M4.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0x1\n"
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"CPU part : 0x003"),
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"exynos-m4");
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const std::string ThunderX2T99ProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 400.00
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics
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CPU implementer : 0x43
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x0af
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)";
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// Verify different versions of ThunderX2T99.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x0516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0xaf"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x0af"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0xaf"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0af"),
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"thunderx2t99");
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// Verify ThunderXT88.
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const std::string ThunderXT88ProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 200.00
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x43
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x0a1
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0a1"),
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"thunderxt88");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0xa1"),
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"thunderxt88");
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// Verify HiSilicon processors.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
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"CPU part : 0xd01"),
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"tsv110");
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// Verify A64FX.
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const std::string A64FXProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 200.00
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Features : fp asimd evtstrm sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm fcma dcpop sve
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CPU implementer : 0x46
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x001
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(A64FXProcCpuInfo), "a64fx");
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// Verify Nvidia Carmel.
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const std::string CarmelProcCpuInfo = R"(
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processor : 0
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model name : ARMv8 Processor rev 0 (v8l)
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BogoMIPS : 62.50
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm dcpop
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CPU implementer : 0x4e
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0x004
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CPU revision : 0
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(CarmelProcCpuInfo), "carmel");
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// Snapdragon mixed implementer quirk
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const std::string Snapdragon865ProcCPUInfo = R"(
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processor : 0
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BogoMIPS : 38.40
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
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CPU implementer : 0x51
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CPU architecture: 8
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CPU variant : 0xd
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CPU part : 0x805
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CPU revision : 14
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processor : 1
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processor : 2
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processor : 3
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processor : 4
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processor : 5
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processor : 6
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BogoMIPS : 38.40
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0xd0d
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CPU revision : 0
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(Snapdragon865ProcCPUInfo), "cortex-a77");
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}
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TEST(getLinuxHostCPUName, s390x) {
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SmallVector<std::string> ModelIDs(
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{"3931", "8561", "3906", "2964", "2827", "2817", "2097", "2064"});
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SmallVector<std::string> VectorSupport({"", "vx"});
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SmallVector<StringRef> ExpectedCPUs;
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// Model Id: 3931
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("arch14");
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// Model Id: 8561
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z15");
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// Model Id: 3906
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z14");
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// Model Id: 2964
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z13");
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// Model Id: 2827
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("zEC12");
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// Model Id: 2817
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ExpectedCPUs.push_back("z196");
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ExpectedCPUs.push_back("z196");
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// Model Id: 2097
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ExpectedCPUs.push_back("z10");
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ExpectedCPUs.push_back("z10");
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// Model Id: 2064
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ExpectedCPUs.push_back("generic");
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ExpectedCPUs.push_back("generic");
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const std::string DummyBaseVectorInfo =
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"features : esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs "
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"te ";
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const std::string DummyBaseMachineInfo =
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"processor 0: version = FF, identification = 059C88, machine = ";
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int CheckIndex = 0;
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for (size_t I = 0; I < ModelIDs.size(); I++) {
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for (size_t J = 0; J < VectorSupport.size(); J++) {
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const std::string DummyCPUInfo = DummyBaseVectorInfo + VectorSupport[J] +
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"\n" + DummyBaseMachineInfo +
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ModelIDs[I];
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EXPECT_EQ(sys::detail::getHostCPUNameForS390x(DummyCPUInfo),
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ExpectedCPUs[CheckIndex++]);
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}
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}
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}
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#if defined(__APPLE__) || defined(_AIX)
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static bool runAndGetCommandOutput(
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const char *ExePath, ArrayRef<llvm::StringRef> argv,
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std::unique_ptr<char[]> &Buffer, off_t &Size) {
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bool Success = false;
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[ExePath, argv, &Buffer, &Size, &Success] {
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using namespace llvm::sys;
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SmallString<128> TestDirectory;
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ASSERT_NO_ERROR(fs::createUniqueDirectory("host_test", TestDirectory));
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SmallString<128> OutputFile(TestDirectory);
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path::append(OutputFile, "out");
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StringRef OutputPath = OutputFile.str();
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const Optional<StringRef> Redirects[] = {
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/*STDIN=*/None, /*STDOUT=*/OutputPath, /*STDERR=*/None};
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int RetCode = ExecuteAndWait(ExePath, argv, /*env=*/llvm::None, Redirects);
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ASSERT_EQ(0, RetCode);
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int FD = 0;
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ASSERT_NO_ERROR(fs::openFileForRead(OutputPath, FD));
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Size = ::lseek(FD, 0, SEEK_END);
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ASSERT_NE(-1, Size);
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::lseek(FD, 0, SEEK_SET);
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Buffer = std::make_unique<char[]>(Size);
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ASSERT_EQ(::read(FD, Buffer.get(), Size), Size);
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::close(FD);
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ASSERT_NO_ERROR(fs::remove(OutputPath));
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ASSERT_NO_ERROR(fs::remove(TestDirectory.str()));
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Success = true;
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}();
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return Success;
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}
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TEST_F(HostTest, DummyRunAndGetCommandOutputUse) {
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// Suppress defined-but-not-used warnings when the tests using the helper are
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// disabled.
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(void) runAndGetCommandOutput;
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}
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#endif
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#if defined(__APPLE__)
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TEST_F(HostTest, getMacOSHostVersion) {
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using namespace llvm::sys;
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llvm::Triple HostTriple(getProcessTriple());
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if (!HostTriple.isMacOSX())
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return;
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const char *SwVersPath = "/usr/bin/sw_vers";
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StringRef argv[] = {SwVersPath, "-productVersion"};
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std::unique_ptr<char[]> Buffer;
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off_t Size;
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ASSERT_EQ(runAndGetCommandOutput(SwVersPath, argv, Buffer, Size), true);
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StringRef SystemVersion(Buffer.get(), Size);
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// Ensure that the two versions match.
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unsigned SystemMajor, SystemMinor, SystemMicro;
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ASSERT_EQ(llvm::Triple((Twine("x86_64-apple-macos") + SystemVersion))
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.getMacOSXVersion(SystemMajor, SystemMinor, SystemMicro),
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true);
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unsigned HostMajor, HostMinor, HostMicro;
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ASSERT_EQ(HostTriple.getMacOSXVersion(HostMajor, HostMinor, HostMicro), true);
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if (SystemMajor > 10) {
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// Don't compare the 'Minor' and 'Micro' versions, as they're always '0' for
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// the 'Darwin' triples on 11.x.
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ASSERT_EQ(SystemMajor, HostMajor);
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} else {
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// Don't compare the 'Micro' version, as it's always '0' for the 'Darwin'
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// triples.
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ASSERT_EQ(std::tie(SystemMajor, SystemMinor), std::tie(HostMajor, HostMinor));
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}
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}
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#endif
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#if defined(_AIX)
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TEST_F(HostTest, AIXVersionDetect) {
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using namespace llvm::sys;
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llvm::Triple HostTriple(getProcessTriple());
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ASSERT_EQ(HostTriple.getOS(), Triple::AIX);
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llvm::Triple ConfiguredHostTriple(LLVM_HOST_TRIPLE);
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ASSERT_EQ(ConfiguredHostTriple.getOS(), Triple::AIX);
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const char *ExePath = "/usr/bin/oslevel";
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StringRef argv[] = {ExePath};
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std::unique_ptr<char[]> Buffer;
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off_t Size;
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ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true);
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StringRef SystemVersion(Buffer.get(), Size);
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unsigned SystemMajor, SystemMinor, SystemMicro;
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llvm::Triple((Twine("powerpc-ibm-aix") + SystemVersion))
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.getOSVersion(SystemMajor, SystemMinor, SystemMicro);
|
|
|
|
// Ensure that the host triple version (major) and release (minor) numbers,
|
|
// unless explicitly configured, match with those of the current system.
|
|
if (!ConfiguredHostTriple.getOSMajorVersion()) {
|
|
unsigned HostMajor, HostMinor, HostMicro;
|
|
HostTriple.getOSVersion(HostMajor, HostMinor, HostMicro);
|
|
ASSERT_EQ(std::tie(SystemMajor, SystemMinor),
|
|
std::tie(HostMajor, HostMinor));
|
|
}
|
|
|
|
llvm::Triple TargetTriple(getDefaultTargetTriple());
|
|
if (TargetTriple.getOS() != Triple::AIX)
|
|
return;
|
|
|
|
// Ensure that the target triple version (major) and release (minor) numbers
|
|
// match with those of the current system.
|
|
llvm::Triple ConfiguredTargetTriple(LLVM_DEFAULT_TARGET_TRIPLE);
|
|
if (ConfiguredTargetTriple.getOSMajorVersion())
|
|
return; // The version was configured explicitly; skip.
|
|
|
|
unsigned TargetMajor, TargetMinor, TargetMicro;
|
|
TargetTriple.getOSVersion(TargetMajor, TargetMinor, TargetMicro);
|
|
ASSERT_EQ(std::tie(SystemMajor, SystemMinor),
|
|
std::tie(TargetMajor, TargetMinor));
|
|
}
|
|
|
|
TEST_F(HostTest, AIXHostCPUDetect) {
|
|
// Return a value based on the current processor implementation mode.
|
|
const char *ExePath = "/usr/sbin/getsystype";
|
|
StringRef argv[] = {ExePath, "-i"};
|
|
std::unique_ptr<char[]> Buffer;
|
|
off_t Size;
|
|
ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true);
|
|
StringRef CPU(Buffer.get(), Size);
|
|
StringRef MCPU = StringSwitch<const char *>(CPU)
|
|
.Case("POWER 4\n", "pwr4")
|
|
.Case("POWER 5\n", "pwr5")
|
|
.Case("POWER 6\n", "pwr6")
|
|
.Case("POWER 7\n", "pwr7")
|
|
.Case("POWER 8\n", "pwr8")
|
|
.Case("POWER 9\n", "pwr9")
|
|
.Case("POWER 10\n", "pwr10")
|
|
.Default("unknown");
|
|
|
|
StringRef HostCPU = sys::getHostCPUName();
|
|
|
|
// Just do the comparison on the base implementation mode.
|
|
if (HostCPU == "970")
|
|
HostCPU = StringRef("pwr4");
|
|
else
|
|
HostCPU = HostCPU.rtrim('x');
|
|
|
|
EXPECT_EQ(HostCPU, MCPU);
|
|
}
|
|
#endif
|