Renato Golin 710d9e32a8 Allow CP10/CP11 operations on ARMv5/v6 ... Those registers are VFP/NEON and vector instructions should be used instead, but old cores rely on those co-processors to enable VFP unwinding. This change was prompted by the libc++abi's unwinding routine and is also present in many legacy low-level bare-metal code that we ought to compile/assemble. Fixing bug PR20025 and allowing PR20529 to proceed with a fix in libc++abi. llvm-svn: 214802		2014-08-04 23:21:56 +00:00
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ARMAsmParser.cpp	Allow CP10/CP11 operations on ARMv5/v6	2014-08-04 23:21:56 +00:00
CMakeLists.txt	[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.	2013-11-28 17:04:04 +00:00
LLVMBuild.txt
Makefile