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e9efb3252f
Shuffles that only move an element into position 0 of the vector are common in the output of the loop vectorizer and often generate suboptimal code when SSSE3 is not available. Lower them to vector shifts if possible. We still prefer palignr over psrldq because it has higher throughput on sandybridge. llvm-svn: 182102
68 lines
2.3 KiB
LLVM
68 lines
2.3 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse2,+ssse3 | FileCheck %s
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; There are no MMX operations in @t1
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define void @t1(i32 %a, x86_mmx* %P) nounwind {
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%tmp12 = shl i32 %a, 12
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%tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1
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%tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0
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%tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx
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store x86_mmx %tmp23, x86_mmx* %P
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ret void
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; CHECK: t1:
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; CHECK-NOT: %mm
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; CHECK: shll $12
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; CHECK-NOT: %mm
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}
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define <4 x float> @t2(<4 x float>* %P) nounwind {
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%tmp1 = load <4 x float>* %P
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
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ret <4 x float> %tmp2
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; CHECK: t2:
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; CHECK: pslldq $12
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}
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define <4 x float> @t3(<4 x float>* %P) nounwind {
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%tmp1 = load <4 x float>* %P
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
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ret <4 x float> %tmp2
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; CHECK: t3:
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; CHECK: psrldq $8
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}
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define <4 x float> @t4(<4 x float>* %P) nounwind {
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%tmp1 = load <4 x float>* %P
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%tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
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ret <4 x float> %tmp2
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; CHECK: t4:
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; CHECK: psrldq $12
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}
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define <16 x i8> @t5(<16 x i8> %x) nounwind {
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%s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17>
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ret <16 x i8> %s
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; CHECK: t5:
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; CHECK: psrldq $1
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}
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define <16 x i8> @t6(<16 x i8> %x) nounwind {
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%s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <16 x i8> %s
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; CHECK: t6:
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; CHECK: palignr $1
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}
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define <16 x i8> @t7(<16 x i8> %x) nounwind {
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%s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2>
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ret <16 x i8> %s
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; CHECK: t7:
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; CHECK: pslldq $13
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}
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