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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
62 lines
1.6 KiB
ArmAsm
62 lines
1.6 KiB
ArmAsm
// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \
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// RUN: llvm-readobj -r | FileCheck %s
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// Test correct relocation generation for thread-local storage using
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// the local dynamic model.
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.file "/home/espindola/llvm/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll"
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.text
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.globl main
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.align 2
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.type main,@function
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.section .opd,"aw",@progbits
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main: # @main
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.align 3
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.quad .L.main
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.quad .TOC.@tocbase
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.quad 0
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.text
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.L.main:
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# %bb.0: # %entry
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addis 3, 2, a@got@tlsld@ha
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addi 3, 3, a@got@tlsld@l
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li 4, 0
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bl __tls_get_addr(a@tlsld)
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nop
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stw 4, -4(1)
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addis 3, 3, a@dtprel@ha
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addi 3, 3, a@dtprel@l
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lwz 4, 0(3)
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extsw 3, 4
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blr
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.long 0
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.quad 0
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.Ltmp0:
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.size main, .Ltmp0-.L.main
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.hidden a # @a
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.type a,@object
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.section .tbss,"awT",@nobits
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.globl a
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.align 2
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a:
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.long 0 # 0x0
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.size a, 4
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// Verify generation of R_PPC64_GOT_TLSLD16_HA, R_PPC64_GOT_TLSLD16_LO,
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// R_PPC64_TLSLD, R_PPC64_DTPREL16_HA, and R_PPC64_DTPREL16_LO for
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// accessing external variable a, and R_PPC64_REL24 for the call to
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// __tls_get_addr.
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//
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// CHECK: Relocations [
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// CHECK: Section {{.*}} .rela.text {
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSLD a
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_HA a
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// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_LO a
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// CHECK: }
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// CHECK: ]
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