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af77a2caf6
Summary: If we have a MI marked with bitcast bits, but without input operands, PeepholeOptimizer might crash with assert. eg: If we apply the changes in PPCInstrVSX.td as in this patch: [(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>; We will get assert in PeepholeOptimizer. ``` llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed. ``` The fix is to abort if we found out of bound access. Reviewers: qcolombet, MatzeB, hfinkel, arsenm Reviewed By: qcolombet Subscribers: wdng, arsenm, steven.zhang, wuzish, nemanjai, hiraditya, kbarton, MaskRay, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65542 llvm-svn: 369261
24 lines
808 B
YAML
24 lines
808 B
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=powerpc64le-linux-gnu -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: bitCast
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: bitCast
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; CHECK: [[XXLEQVOnes:%[0-9]+]]:vsrc = XXLEQVOnes
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; CHECK: $v2 = COPY [[XXLEQVOnes]]
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; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $v2
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%0:vsrc = XXLEQVOnes
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$v2 = COPY %0
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BLR8 implicit $lr8, implicit $rm, implicit $v2
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...
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# This used to hit an assertion:
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# llvm/include/llvm/CodeGen/MachineInstr.h:417: const
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# llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
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# const: Assertion `i < getNumOperands() && "getOperand() out of range!"' failed.
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#
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