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73ee5ff6b8
Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. llvm-svn: 6343 |
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.. | ||
MRegisterInfo.h | ||
TargetCacheInfo.h | ||
TargetData.h | ||
TargetFrameInfo.h | ||
TargetInstrInfo.h | ||
TargetMachine.h | ||
TargetMachineImpls.h | ||
TargetOptInfo.h | ||
TargetRegInfo.h | ||
TargetSchedInfo.h |