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Summary: The BFloat IR type is introduced to provide support for, initially, the BFloat16 datatype introduced with the Armv8.6 architecture (optional from Armv8.2 onwards). It has an 8-bit exponent and a 7-bit mantissa and behaves like an IEEE 754 floating point IR type. This is part of a patch series upstreaming Armv8.6 features. Subsequent patches will upstream intrinsics support and C-lang support for BFloat. Reviewers: SjoerdMeijer, rjmccall, rsmith, liutianle, RKSimon, craig.topper, jfb, LukeGeeson, sdesmalen, deadalnix, ctetreau Subscribers: hiraditya, llvm-commits, danielkiss, arphaman, kristof.beyls, dexonsmith Tags: #llvm Differential Revision: https://reviews.llvm.org/D78190
39 lines
959 B
LLVM
39 lines
959 B
LLVM
; RUN: llvm-as < %s | llvm-dis | FileCheck %s --check-prefix=ASSEM-DISASS
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; RUN: opt < %s -O3 -S | FileCheck %s --check-prefix=OPT
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; RUN: verify-uselistorder %s
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; Basic smoke tests for bfloat type.
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define bfloat @check_bfloat(bfloat %A) {
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; ASSEM-DISASS: ret bfloat %A
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ret bfloat %A
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}
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define bfloat @check_bfloat_literal() {
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; ASSEM-DISASS: ret bfloat 0xR3149
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ret bfloat 0xR3149
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}
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define <4 x bfloat> @check_fixed_vector() {
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; ASSEM-DISASS: ret <4 x bfloat> %tmp
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%tmp = fadd <4 x bfloat> undef, undef
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ret <4 x bfloat> %tmp
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}
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define <vscale x 4 x bfloat> @check_vector() {
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; ASSEM-DISASS: ret <vscale x 4 x bfloat> %tmp
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%tmp = fadd <vscale x 4 x bfloat> undef, undef
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ret <vscale x 4 x bfloat> %tmp
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}
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define bfloat @check_bfloat_constprop() {
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%tmp = fadd bfloat 0xR40C0, 0xR40C0
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; OPT: 0xR4140
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ret bfloat %tmp
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}
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define float @check_bfloat_convert() {
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%tmp = fpext bfloat 0xR4C8D to float
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; OPT: 0x4191A00000000000
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ret float %tmp
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}
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