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https://github.com/RPCS3/llvm-mirror.git
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139 lines
6.3 KiB
LLVM
139 lines
6.3 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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define i16 @test1(float %f) {
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entry:
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; CHECK: @test1
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; CHECK: fmul float
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; CHECK-NOT: insertelement {{.*}} 0.00
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; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul
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; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub
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; CHECK: ret
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%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
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%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
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%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
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%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
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%tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
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%tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
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%tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
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ret i16 %tmp69
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}
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define i32 @test2(float %f) {
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; CHECK: @test2
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; CHECK-NOT: insertelement
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; CHECK-NOT: extractelement
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; CHECK: ret
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%tmp5 = fmul float %f, %f
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%tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
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%tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
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%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
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%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
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%tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
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%tmp21 = extractelement <4 x i32> %tmp19, i32 0
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ret i32 %tmp21
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}
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define i64 @test3(float %f, double %d) {
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; CHECK: @test3
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; CHECK-NOT: insertelement {{.*}} 0.00
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; CHECK: ret
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entry:
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%v00 = insertelement <4 x float> undef, float %f, i32 0
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%v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1
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%v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2
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%v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3
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%tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
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%v10 = insertelement <4 x float> undef, float %f, i32 0
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%v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1
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%v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2
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%v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3
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%tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13)
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%v20 = insertelement <4 x float> undef, float %f, i32 0
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%v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1
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%v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2
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%v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3
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%tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23)
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%v30 = insertelement <4 x float> undef, float %f, i32 0
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%v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1
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%v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2
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%v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3
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%tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33)
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%v40 = insertelement <2 x double> undef, double %d, i32 0
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%v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1
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%tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41)
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%v50 = insertelement <2 x double> undef, double %d, i32 0
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%v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1
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%tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51)
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%v60 = insertelement <2 x double> undef, double %d, i32 0
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%v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1
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%tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61)
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%v70 = insertelement <2 x double> undef, double %d, i32 0
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%v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1
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%tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71)
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%tmp8 = add i32 %tmp0, %tmp2
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%tmp9 = add i32 %tmp4, %tmp6
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%tmp10 = add i32 %tmp8, %tmp9
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%tmp11 = sext i32 %tmp10 to i64
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%tmp12 = add i64 %tmp1, %tmp3
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%tmp13 = add i64 %tmp5, %tmp7
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%tmp14 = add i64 %tmp12, %tmp13
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%tmp15 = add i64 %tmp11, %tmp14
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ret i64 %tmp15
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}
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define void @get_image() nounwind {
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; CHECK: @get_image
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; CHECK-NOT: extractelement
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; CHECK: unreachable
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entry:
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%0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
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%1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
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%tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
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%tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
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%2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
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br i1 %2, label %bb2, label %bb3
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bb2: ; preds = %entry
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br label %bb3
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bb3: ; preds = %bb2, %entry
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unreachable
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}
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; PR4340
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define void @vac(<4 x float>* nocapture %a) nounwind {
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; CHECK: @vac
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; CHECK-NOT: load
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; CHECK: ret
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entry:
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%tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1]
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%vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
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%vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
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%vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
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%vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
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store <4 x float> %vecins8, <4 x float>* %a
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ret void
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}
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declare i32 @fgetc(i8*)
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
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declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
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declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>)
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declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
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declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>)
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declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>)
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declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>)
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declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>)
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declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>)
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