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1018fe2e77
There were no memory dependencies made between stores generated when lowering formal arguments and loads generated when call lowering byVal arguments which made the Post-RA scheduler place a load before a matching store. Make the fixed object stored to mutable so that the load instructions can have their memory dependencies added Set the frame object as isAliased which clears the underlying objects vector in ScheduleDAGInstrs::buildSchedGraph(). This results in addition of all stores as dependenies for loads. This problem appeared when passing a byVal parameter coupled with a fastcc function call. Differential Revision: https://reviews.llvm.org/D37515 llvm-svn: 325782
28 lines
1.2 KiB
LLVM
28 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -O3 -relocation-model=pic < %s | FileCheck %s
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; Test that a load comes after a store to the same memory location when passing
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; a byVal parameter to a function which has a fastcc function call
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%struct.str = type { i32, i32, [3 x i32*] }
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declare fastcc void @_Z1F3str(%struct.str* noalias nocapture sret %agg.result, %struct.str* byval nocapture readonly align 4 %s)
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define i32 @_Z1g3str(%struct.str* byval nocapture readonly align 4 %s) {
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; CHECK-LABEL: _Z1g3str:
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; CHECK: sw $7, [[OFFSET:[0-9]+]]($sp)
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; CHECK: lw ${{[0-9]+}}, [[OFFSET]]($sp)
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entry:
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%ref.tmp = alloca %struct.str, align 4
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%0 = bitcast %struct.str* %ref.tmp to i8*
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call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %0)
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call fastcc void @_Z1F3str(%struct.str* nonnull sret %ref.tmp, %struct.str* byval nonnull align 4 %s)
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%cl.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.str, %struct.str* %ref.tmp, i32 0, i32 1
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%cl.sroa.3.0.copyload = load i32, i32* %cl.sroa.3.0..sroa_idx2, align 4
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call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %0)
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ret i32 %cl.sroa.3.0.copyload
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}
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
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