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https://github.com/RPCS3/llvm-mirror.git
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db43217a24
Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
148 lines
5.4 KiB
LLVM
148 lines
5.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-BE
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define <4 x float> @test0f(<4 x float> %a) {
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entry:
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%0 = bitcast <4 x float> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%2 = bitcast <16 x i8> %1 to <4 x float>
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ret <4 x float> %2
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; CHECK-LABEL: test0f
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; CHECK xxspltw: 34, 34, 3
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; CHECK-BE-LABEL: test0f
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; CHECK-BE: xxspltw 34, 34, 0
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}
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define <4 x float> @test1f(<4 x float> %a) {
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entry:
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%0 = bitcast <4 x float> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
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%2 = bitcast <16 x i8> %1 to <4 x float>
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ret <4 x float> %2
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; CHECK-LABEL: test1f
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; CHECK xxspltw: 34, 34, 2
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; CHECK-BE-LABEL: test1f
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; CHECK-BE: xxspltw 34, 34, 1
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}
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define <4 x float> @test2f(<4 x float> %a) {
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entry:
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%0 = bitcast <4 x float> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>
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%2 = bitcast <16 x i8> %1 to <4 x float>
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ret <4 x float> %2
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; CHECK-LABEL: test2f
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; CHECK xxspltw: 34, 34, 1
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; CHECK-LABEL: test2f
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; CHECK-BE: xxspltw 34, 34, 2
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}
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define <4 x float> @test3f(<4 x float> %a) {
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entry:
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%0 = bitcast <4 x float> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
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%2 = bitcast <16 x i8> %1 to <4 x float>
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ret <4 x float> %2
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; CHECK-LABEL: test3f
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; CHECK xxspltw: 34, 34, 0
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; CHECK-BE-LABEL: test3f
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; CHECK-BE: xxspltw 34, 34, 3
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}
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define <4 x i32> @test0si(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test0si
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; CHECK xxspltw: 34, 34, 3
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; CHECK-BE-LABEL: test0si
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; CHECK-BE: xxspltw 34, 34, 0
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}
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define <4 x i32> @test1si(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test1si
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; CHECK xxspltw: 34, 34, 2
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; CHECK-BE-LABEL: test1si
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; CHECK-BE: xxspltw 34, 34, 1
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}
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define <4 x i32> @test2si(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test2si
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; CHECK xxspltw: 34, 34, 1
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; CHECK-BE-LABEL: test2si
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; CHECK-BE: xxspltw 34, 34, 2
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}
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define <4 x i32> @test3si(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test3si
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; CHECK xxspltw: 34, 34, 0
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; CHECK-BE-LABEL: test3si
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; CHECK-BE: xxspltw 34, 34, 3
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}
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define <4 x i32> @test0ui(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test0ui
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; CHECK xxspltw: 34, 34, 3
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; CHECK-BE-LABEL: test0ui
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; CHECK-BE: xxspltw 34, 34, 0
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}
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define <4 x i32> @test1ui(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test1ui
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; CHECK xxspltw: 34, 34, 2
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; CHECK-BE-LABEL: test1ui
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; CHECK-BE: xxspltw 34, 34, 1
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}
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define <4 x i32> @test2ui(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test2ui
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; CHECK xxspltw: 34, 34, 1
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; CHECK-BE-LABEL: test2ui
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; CHECK-BE: xxspltw 34, 34, 2
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}
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define <4 x i32> @test3ui(<4 x i32> %a) {
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entry:
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%0 = bitcast <4 x i32> %a to <16 x i8>
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%1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
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%2 = bitcast <16 x i8> %1 to <4 x i32>
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ret <4 x i32> %2
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; CHECK-LABEL: test3ui
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; CHECK xxspltw: 34, 34, 0
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; CHECK-BE-LABEL: test3ui
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; CHECK-BE: xxspltw 34, 34, 3
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}
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