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Two backend optimizations failed to handle cases when compiled with -g, due to failing to consider DBG_VALUE instructions. This was in SystemZTargetLowering::emitSelect() and SystemZElimCompare::getRegReferences(). This patch makes sure that DBG_VALUEs are recognized so that they do not affect these optimizations. Tests for branch-on-count, load-and-trap and consecutive selects. Review: Ulrich Weigand https://reviews.llvm.org/D57048 llvm-svn: 351928
81 lines
2.5 KiB
YAML
81 lines
2.5 KiB
YAML
# Check that the backend can produce a load-and-trap instruction also in
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# the presence of a DEBUG_VALUE machine instruction.
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#
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# RUN: llc %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -start-before=postrapseudos \
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# RUN: -o - 2>&1 | FileCheck %s
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#
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# CHECK: lat
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--- |
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define i32 @f1(i32* %ptr) #1 {
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entry:
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%val = load i32, i32* %ptr
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; Keep the dbg metadata live by referencing it in the IR.
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call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !7, metadata !DIExpression()), !dbg !9
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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if.end: ; preds = %entry
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ret i32 %val
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}
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declare void @llvm.trap() #0
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
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declare void @llvm.stackprotector(i8*, i8**) #2
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attributes #0 = { cold noreturn nounwind "target-cpu"="zEC12" }
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attributes #1 = { "target-cpu"="zEC12" }
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attributes #2 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "test.ll", directory: "/tmp")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
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!6 = !DISubroutineType(types: !2)
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!7 = !DILocalVariable(name: "in", arg: 1, scope: !5, file: !1, line: 1, type: !8)
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!8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!9 = !DILocation(line: 1, column: 1, scope: !5)
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...
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---
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name: f1
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r2d' }
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frameInfo:
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maxCallFrameSize: 0
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body: |
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bb.0.entry:
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successors: %bb.1(0x00000001), %bb.2(0x7fffffff)
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liveins: $r2d
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renamable $r2l = LMux killed renamable $r2d, 0, $noreg :: (load 4 from %ir.ptr)
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DBG_VALUE $noreg, $r2l, !7, !DIExpression(), debug-location !9
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CHIMux renamable $r2l, 0, implicit-def $cc
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DBG_VALUE $noreg, $r2l, !7, !DIExpression(), debug-location !9
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BRC 14, 6, %bb.2, implicit killed $cc
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bb.1.if.then:
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successors:
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Trap
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bb.2.if.end:
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liveins: $r2l
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Return implicit $r2l
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...
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