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1c46c7087d
It caused assertions to fire when building Chromium:
lib/CodeGen/LiveDebugValues.cpp:331: bool
{anonymous}::LiveDebugValues::OpenRangesSet::empty() const: Assertion
`Vars.empty() == VarLocs.empty() && "open ranges are inconsistent"' failed.
See https://crbug.com/992871#c3 for how to reproduce.
> Patch https://reviews.llvm.org/D43256 introduced more aggressive loop layout optimization which depends on profile information. If profile information is not available, the statically estimated profile information(generated by BranchProbabilityInfo.cpp) is used. If user program doesn't behave as BranchProbabilityInfo.cpp expected, the layout may be worse.
>
> To be conservative this patch restores the original layout algorithm in plain mode. But user can still try the aggressive layout optimization with -force-precise-rotation-cost=true.
>
> Differential Revision: https://reviews.llvm.org/D65673
llvm-svn: 368579
57 lines
1.8 KiB
LLVM
57 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv6m-none-unknown-eabi -tail-dup-placement-threshold=3 < %s | FileCheck %s
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define hidden void @test() {
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; CHECK-LABEL: test:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: lsls r1, r0, #2
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; CHECK-NEXT: b .LBB0_2
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; CHECK-NEXT: .LBB0_1: @ %bb2
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; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: cmp r0, #0
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; CHECK-NEXT: bne .LBB0_6
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; CHECK-NEXT: .LBB0_2: @ %switch
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: adr r2, .LJTI0_0
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; CHECK-NEXT: ldr r2, [r2, r1]
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; CHECK-NEXT: mov pc, r2
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; CHECK-NEXT: @ %bb.3:
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; CHECK-NEXT: .p2align 2
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; CHECK-NEXT: .LJTI0_0:
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; CHECK-NEXT: .long .LBB0_6+1
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; CHECK-NEXT: .long .LBB0_4+1
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; CHECK-NEXT: .long .LBB0_6+1
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; CHECK-NEXT: .long .LBB0_5+1
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; CHECK-NEXT: .LBB0_4: @ %switch
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; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: b .LBB0_1
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; CHECK-NEXT: .LBB0_5: @ %bb
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; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: cmp r0, #0
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; CHECK-NEXT: beq .LBB0_1
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; CHECK-NEXT: .LBB0_6: @ %dead
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entry:
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br label %switch
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switch: ; preds = %bb2, %entry
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switch i32 undef, label %dead2 [
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i32 0, label %dead
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i32 1, label %bb2
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i32 2, label %dead
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i32 3, label %bb
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]
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dead: ; preds = %bb2, %bb, %switch, %switch
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unreachable
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dead2: ; preds = %switch
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unreachable
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bb: ; preds = %switch
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br i1 undef, label %dead, label %bb2
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bb2: ; preds = %bb, %switch
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br i1 undef, label %dead, label %switch
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}
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