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38e5713f51
Summary: This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon Reviewed By: RKSimon Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60228 llvm-svn: 357802
119 lines
5.2 KiB
YAML
119 lines
5.2 KiB
YAML
# REQUIRES: asserts
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# RUN: llc -mtriple=x86_64-- -run-pass=simple-register-coalescing -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s
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# Check the test will rematerialize for three copies, but will call shrinkToUses
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# only once to update live range because of late rematerialization update.
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# CHECK: 3 regalloc - Number of instructions re-materialized
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# CHECK: 1 regalloc - Number of shrinkToUses called
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--- |
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function Attrs: noreturn uwtable
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define void @_Z3fooi(i32 %value) local_unnamed_addr #0 {
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entry:
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br label %do.body
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do.body: ; preds = %do.body, %sw.bb2, %entry
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tail call void asm sideeffect "", "~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #2, !srcloc !3
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switch i32 %value, label %do.body [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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]
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sw.bb: ; preds = %do.body
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tail call void @_Z3gooi(i32 2122)
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br label %sw.bb1
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sw.bb1: ; preds = %sw.bb, %do.body
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tail call void @_Z3gooi(i32 2122)
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br label %sw.bb2
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sw.bb2: ; preds = %sw.bb1, %do.body
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tail call void @_Z3gooi(i32 2122)
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br label %do.body
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}
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declare void @_Z3gooi(i32) local_unnamed_addr #1
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #2
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attributes #0 = { noreturn uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"PIC Level", i32 2}
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!2 = !{!"clang version 7.0.0 (trunk 335057)"}
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!3 = !{i32 82}
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...
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---
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name: _Z3fooi
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr32 }
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- { id: 1, class: gr32 }
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- { id: 2, class: gr32 }
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- { id: 3, class: gr32 }
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- { id: 4, class: gr32 }
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- { id: 5, class: gr32 }
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liveins:
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- { reg: '$edi', virtual-reg: '%0' }
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frameInfo:
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hasCalls: true
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body: |
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bb.0.entry:
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liveins: $edi
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%0:gr32 = COPY killed $edi
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%5:gr32 = MOV32ri 2122
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bb.1.do.body:
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successors: %bb.6(0x15555555), %bb.2(0x6aaaaaab)
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INLINEASM &"", 1, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def dead early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $eflags, !3
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CMP32ri8 %0, 2, implicit-def $eflags
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JCC_1 %bb.6, 4, implicit killed $eflags
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JMP_1 %bb.2
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bb.2.do.body:
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successors: %bb.5(0x19999999), %bb.3(0x66666667)
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CMP32ri8 %0, 1, implicit-def $eflags
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JCC_1 %bb.5, 4, implicit killed $eflags
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JMP_1 %bb.3
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bb.3.do.body:
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successors: %bb.4(0x20000000), %bb.1(0x60000000)
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TEST32rr %0, %0, implicit-def $eflags
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JCC_1 %bb.1, 5, implicit killed $eflags
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JMP_1 %bb.4
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bb.4.sw.bb:
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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$edi = COPY %5
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CALL64pcrel32 @_Z3gooi, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit-def $rsp, implicit-def $ssp
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ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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bb.5.sw.bb1:
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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$edi = COPY %5
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CALL64pcrel32 @_Z3gooi, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit-def $rsp, implicit-def $ssp
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ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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bb.6.sw.bb2:
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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$edi = COPY %5
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CALL64pcrel32 @_Z3gooi, csr_64, implicit $rsp, implicit $ssp, implicit killed $edi, implicit-def $rsp, implicit-def $ssp
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ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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JMP_1 %bb.1
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...
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