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bcf0742f7f
If we're after type legalization we should only be trying to turn v2i64 into v2i32. So bitcast to v4i32, shuffle the even elements together. Then use X86ISD::CVTSI2P. The alternative is to leave the v2i64 type alone and let it scalarized. Hopefully keeping it packed is better. Fixes PR42905. llvm-svn: 368091
27 lines
1.1 KiB
LLVM
27 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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define <4 x double> @autogen_SD30452(i1 %L230) {
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; CHECK-LABEL: autogen_SD30452:
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; CHECK: # %bb.0: # %BB
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; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [151829,151829]
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; CHECK-NEXT: movq %xmm0, %rax
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; CHECK-NEXT: cvtsi2sd %rax, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
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; CHECK-NEXT: movq %xmm2, %rax
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; CHECK-NEXT: xorps %xmm2, %xmm2
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; CHECK-NEXT: cvtsi2sd %rax, %xmm2
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; CHECK-NEXT: cvtdq2pd %xmm1, %xmm1
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; CHECK-NEXT: retq
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BB:
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%I = insertelement <4 x i64> zeroinitializer, i64 151829, i32 3
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%Shuff7 = shufflevector <4 x i64> %I, <4 x i64> zeroinitializer, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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br label %CF242
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CF242: ; preds = %CF242, %BB
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%FC125 = sitofp <4 x i64> %Shuff7 to <4 x double>
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ret <4 x double> %FC125
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}
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