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llvm-mirror/test/MC/Disassembler
2012-05-31 00:49:56 +00:00
..
ARM Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions. 2012-05-11 09:28:27 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Add lit.local.cfg to run the tests in test/MC/Disassembler/Mips. 2012-05-31 00:49:56 +00:00
X86 Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 2012-05-29 19:05:25 +00:00