1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
Diana Picus 74ef680dc6 [ARM] GlobalISel: Add mapping for G_CONSTANT
Like G_FRAME_INDEX, G_CONSTANT has one register operand and one non-register
operand.

llvm-svn: 296469
2017-02-28 12:13:58 +00:00

329 lines
7.2 KiB
YAML

# RUN: llc -mtriple arm-- -global-isel -run-pass=regbankselect %s -o - | FileCheck %s
--- |
define void @test_add_s32() { ret void }
define void @test_add_s16() { ret void }
define void @test_add_s8() { ret void }
define void @test_add_s1() { ret void }
define void @test_loads() #0 { ret void }
define void @test_stores() #0 { ret void }
define void @test_gep() { ret void }
define void @test_constants() { ret void }
define void @test_fadd_s32() #0 { ret void }
define void @test_fadd_s64() #0 { ret void }
define void @test_soft_fp_s64() #0 { ret void }
attributes #0 = { "target-features"="+vfp2"}
...
---
name: test_add_s32
# CHECK-LABEL: name: test_add_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s32) = G_ADD %0, %1
%r0 = COPY %2(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s16
# CHECK-LABEL: name: test_add_s16
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
%2(s16) = G_ADD %0, %1
%r0 = COPY %2(s16)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s8
# CHECK-LABEL: name: test_add_s8
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
%2(s8) = G_ADD %0, %1
%r0 = COPY %2(s8)
BX_RET 14, _, implicit %r0
...
---
name: test_add_s1
# CHECK-LABEL: name: test_add_s1
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s1) = COPY %r0
%1(s1) = COPY %r1
%2(s1) = G_ADD %0, %1
%r0 = COPY %2(s1)
BX_RET 14, _, implicit %r0
...
---
name: test_loads
# CHECK-LABEL: name: test_loads
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
# CHECK: - { id: 3, class: gprb }
# CHECK: - { id: 4, class: gprb }
# CHECK: - { id: 5, class: gprb }
# CHECK: - { id: 6, class: fprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: %r0
%0(p0) = COPY %r0
%6(s64) = G_LOAD %0 :: (load 8)
%1(s32) = G_LOAD %0 :: (load 4)
%2(s16) = G_LOAD %0 :: (load 2)
%3(s8) = G_LOAD %0 :: (load 1)
%4(s1) = G_LOAD %0 :: (load 1)
%5(p0) = G_LOAD %0 :: (load 4)
BX_RET 14, _, implicit %r0
...
---
name: test_stores
# CHECK-LABEL: name: test_stores
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
# CHECK: - { id: 3, class: gprb }
# CHECK: - { id: 4, class: gprb }
# CHECK: - { id: 5, class: gprb }
# CHECK: - { id: 6, class: fprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: %r0, %r1, %r2, %r3, %r4, %r5, %d6
%0(p0) = COPY %r0
%1(s32) = COPY %r1
G_STORE %1(s32), %0 :: (store 4)
%2(s16) = COPY %r2
G_STORE %2(s16), %0 :: (store 2)
%3(s8) = COPY %r3
G_STORE %3(s8), %0 :: (store 1)
%4(s1) = COPY %r4
G_STORE %4(s1), %0 :: (store 1)
%5(p0) = COPY %r5
G_STORE %5(p0), %0 :: (store 4)
%6(s64) = COPY %d6
G_STORE %6(s64), %0 :: (store 8)
BX_RET 14, _, implicit %r0
...
---
name: test_gep
# CHECK-LABEL: name: test_gep
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(p0) = COPY %r0
%1(s32) = COPY %r1
%2(p0) = G_GEP %0, %1(s32)
%r0 = COPY %2(p0)
BX_RET 14, _, implicit %r0
...
---
name: test_constants
# CHECK-LABEL: name: test_constants
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
registers:
- { id: 0, class: _ }
body: |
bb.0:
%0(s32) = G_CONSTANT 42
%r0 = COPY %0(s32)
BX_RET 14, _, implicit %r0
...
---
name: test_fadd_s32
# CHECK-LABEL: name: test_fadd_s32
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb }
# CHECK: - { id: 1, class: fprb }
# CHECK: - { id: 2, class: fprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %s0, %s1
%0(s32) = COPY %s0
%1(s32) = COPY %s1
%2(s32) = G_FADD %0, %1
%s0 = COPY %2(s32)
BX_RET 14, _, implicit %s0
...
---
name: test_fadd_s64
# CHECK-LABEL: name: test_fadd_s64
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: fprb }
# CHECK: - { id: 1, class: fprb }
# CHECK: - { id: 2, class: fprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: %d0, %d1
%0(s64) = COPY %d0
%1(s64) = COPY %d1
%2(s64) = G_FADD %0, %1
%d0 = COPY %2(s64)
BX_RET 14, _, implicit %d0
...
---
name: test_soft_fp_s64
# CHECK-LABEL: name: test_soft_fp_s64
legalized: true
regBankSelected: false
selected: false
# CHECK: registers:
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: fprb }
# CHECK: - { id: 3, class: gprb }
# CHECK: - { id: 4, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
%1(s32) = COPY %r1
%2(s64) = G_SEQUENCE %0(s32), 0, %1(s32), 32
%3(s32), %4(s32) = G_EXTRACT %2(s64), 0, 32
%r0 = COPY %3(s32)
%r1 = COPY %4(s32)
BX_RET 14, _, implicit %r0, implicit %r1
...