..
AsmParser
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
Disassembler
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
MCTargetDesc
[Hexagon] Use itinerary for assembler HVX resource checking
2020-01-17 13:14:04 -06:00
TargetInfo
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
BitTracker.cpp
[Hexagon] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:35:02 +01:00
BitTracker.h
CMakeLists.txt
Hexagon.h
Hexagon.td
[Hexagon] Improve HVX version checks
2020-01-17 09:40:26 -06:00
HexagonAsmPrinter.cpp
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
HexagonAsmPrinter.h
HexagonBitSimplify.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonBitTracker.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp
[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
2019-09-27 12:54:21 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonConstExtenders.cpp
[Hexagon] Add a target feature to disable compound instructions
2020-01-16 12:37:30 -06:00
HexagonConstPropagation.cpp
Reland 'Fixed -Wdeprecated-copy warnings. NFCI.'
2019-11-23 23:09:39 +01:00
HexagonCopyToCombine.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
HexagonDepArch.h
HexagonDepArch.td
HexagonDepDecoders.inc
HexagonDepIICHVX.td
HexagonDepIICScalar.td
HexagonDepInstrFormats.td
HexagonDepInstrInfo.td
[Hexagon] Add prev65 subtarget feature
2020-01-17 09:27:27 -06:00
HexagonDepITypes.h
HexagonDepITypes.td
HexagonDepMapAsm2Intrin.td
[Hexagon] Update autogeneated intrinsic information in LLVM
2020-01-16 13:11:18 -06:00
HexagonDepMappings.td
HexagonDepOperands.td
Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
2019-09-19 16:26:14 +00:00
HexagonDepTimingClasses.h
HexagonEarlyIfConv.cpp
Fix "pointer is null" static analyzer warnings. NFCI.
2020-01-10 11:10:42 +00:00
HexagonExpandCondsets.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
HexagonFixupHwLoops.cpp
[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
2019-09-27 12:54:21 +00:00
HexagonFrameLowering.cpp
[Hexagon] Fix vector spill expansion to use proper alignment
2019-11-12 09:43:21 -06:00
HexagonFrameLowering.h
Use Align for TFL::TransientStackAlignment
2019-10-21 08:31:25 +00:00
HexagonGenExtract.cpp
[IR] Split out target specific intrinsic enums into separate headers
2019-12-11 18:02:14 -08:00
HexagonGenInsert.cpp
Reland 'Fixed -Wdeprecated-copy warnings. NFCI.'
2019-11-23 23:09:39 +01:00
HexagonGenMux.cpp
[Hexagon] Validate the iterators before converting them to mux.
2019-11-14 13:01:16 -06:00
HexagonGenPredicate.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonHardwareLoops.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV5.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
HexagonInstrInfo.h
Use MCRegister in copyPhysReg
2019-11-11 14:42:33 +05:30
HexagonIntrinsics.td
[Hexagon] Remove incorrect intrinsic definition and invalid testcase
2019-11-21 09:18:15 -06:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
HexagonISelDAGToDAG.cpp
[Hexagon] Add a target feature to disable compound instructions
2020-01-16 12:37:30 -06:00
HexagonISelDAGToDAG.h
[Hexagon] Update PS_aligna with max stack alignment once isel completes
2019-11-12 11:47:29 -06:00
HexagonISelDAGToDAGHVX.cpp
[IR] Split out target specific intrinsic enums into separate headers
2019-12-11 18:02:14 -08:00
HexagonISelLowering.cpp
CodeGen: Use LLT instead of EVT in getRegisterByName
2020-01-09 17:37:52 -05:00
HexagonISelLowering.h
CodeGen: Use LLT instead of EVT in getRegisterByName
2020-01-09 17:37:52 -05:00
HexagonISelLoweringHVX.cpp
[DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal'
2020-01-03 03:26:41 +00:00
HexagonLoopIdiomRecognition.cpp
Revert "[SCEV] Move ScalarEvolutionExpander.cpp to Transforms/Utils (NFC)."
2020-01-04 18:44:38 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonOperands.td
HexagonOptAddrMode.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonOptimizeSZextends.cpp
[IR] Split out target specific intrinsic enums into separate headers
2019-12-11 18:02:14 -08:00
HexagonPatterns.td
[Hexagon] Add a target feature to disable compound instructions
2020-01-16 12:37:30 -06:00
HexagonPatternsHVX.td
[Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX
2019-09-23 14:33:27 +00:00
HexagonPatternsV65.td
HexagonPeephole.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
HexagonPseudo.td
[Hexagon] Fix vector spill expansion to use proper alignment
2019-11-12 09:43:21 -06:00
HexagonRDFOpt.cpp
Sink all InitializePasses.h includes
2019-11-13 16:34:37 -08:00
HexagonRegisterInfo.cpp
[Hexagon] Fix vector spill expansion to use proper alignment
2019-11-12 09:43:21 -06:00
HexagonRegisterInfo.h
[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
2020-01-19 14:20:37 -08:00
HexagonRegisterInfo.td
[NFC] Fix trivial typos in comments
2020-01-06 10:50:26 +00:00
HexagonSchedule.td
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
HexagonSplitDouble.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
HexagonStoreWidening.cpp
Make more use of MachineInstr::mayLoadOrStore.
2019-12-19 11:51:52 +00:00
HexagonSubtarget.cpp
Use a bit of relaxed constexpr to make FeatureBitset costant intializable
2019-08-24 15:02:44 +00:00
HexagonSubtarget.h
[Hexagon] Improve HVX version checks
2020-01-17 09:40:26 -06:00
HexagonTargetMachine.cpp
CMake: Make most target symbols hidden by default
2020-01-14 19:46:52 -08:00
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp
Revert "Honor -fuse-init-array when os is not specified on x86"
2019-12-17 07:36:59 -08:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp
[ARM] Teach the Arm cost model that a Shift can be folded into other instructions
2019-12-09 10:24:33 +00:00
HexagonTargetTransformInfo.h
[ARM] Teach the Arm cost model that a Shift can be folded into other instructions
2019-12-09 10:24:33 +00:00
HexagonVectorLoopCarriedReuse.cpp
[IR] Split out target specific intrinsic enums into separate headers
2019-12-11 18:02:14 -08:00
HexagonVectorPrint.cpp
HexagonVExtract.cpp
[Hexagon] Handle stack realignment in hexagon-vextract
2019-11-12 09:43:21 -06:00
HexagonVLIWPacketizer.cpp
[Hexagon] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:35:02 +01:00
HexagonVLIWPacketizer.h
Prune two MachineInstr.h includes, fix up deps
2019-10-19 00:22:07 +00:00
LLVMBuild.txt
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp
Prune two MachineInstr.h includes, fix up deps
2019-10-19 00:22:07 +00:00
RDFDeadCode.h
RDFGraph.cpp
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
2019-08-15 19:22:08 +00:00
RDFGraph.h
RDFLiveness.cpp
[Hexagon] Fixes -Wrange-loop-analysis warnings
2019-12-22 19:35:02 +01:00
RDFLiveness.h
RDFRegisters.cpp
RDFRegisters.h
