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8b3e71f73b
This patch test disassembler output for load/store instructions when -mattr=+alu32 specified for which we want to use "w" register format. Also, this patch extended the existing insn-unit.s and insn-unit-32.s to make sure disassemblers for all other instructions are not affected. Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Reviewed-by: Yonghong Song <yhs@fb.com> llvm-svn: 325993
26 lines
1.2 KiB
ArmAsm
26 lines
1.2 KiB
ArmAsm
# RUN: llvm-mc -triple bpfel -filetype=obj -o %t %s
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# RUN: llvm-objdump -mattr=+alu32 -d -r %t | FileCheck --check-prefix=CHECK-32 %s
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# RUN: llvm-objdump -d -r %t | FileCheck %s
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// ======== BPF_LDX Class ========
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w5 = *(u8 *)(r0 + 0) // BPF_LDX | BPF_B
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w6 = *(u16 *)(r1 + 8) // BPF_LDX | BPF_H
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w7 = *(u32 *)(r2 + 16) // BPF_LDX | BPF_W
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// CHECK-32: 71 05 00 00 00 00 00 00 w5 = *(u8 *)(r0 + 0)
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// CHECK-32: 69 16 08 00 00 00 00 00 w6 = *(u16 *)(r1 + 8)
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// CHECK-32: 61 27 10 00 00 00 00 00 w7 = *(u32 *)(r2 + 16)
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// CHECK: 71 05 00 00 00 00 00 00 r5 = *(u8 *)(r0 + 0)
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// CHECK: 69 16 08 00 00 00 00 00 r6 = *(u16 *)(r1 + 8)
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// CHECK: 61 27 10 00 00 00 00 00 r7 = *(u32 *)(r2 + 16)
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// ======== BPF_STX Class ========
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*(u8 *)(r0 + 0) = w7 // BPF_STX | BPF_B
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*(u16 *)(r1 + 8) = w8 // BPF_STX | BPF_H
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*(u32 *)(r2 + 16) = w9 // BPF_STX | BPF_W
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// CHECK-32: 73 70 00 00 00 00 00 00 *(u8 *)(r0 + 0) = w7
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// CHECK-32: 6b 81 08 00 00 00 00 00 *(u16 *)(r1 + 8) = w8
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// CHECK-32: 63 92 10 00 00 00 00 00 *(u32 *)(r2 + 16) = w9
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// CHECK: 73 70 00 00 00 00 00 00 *(u8 *)(r0 + 0) = r7
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// CHECK: 6b 81 08 00 00 00 00 00 *(u16 *)(r1 + 8) = r8
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// CHECK: 63 92 10 00 00 00 00 00 *(u32 *)(r2 + 16) = r9
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