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These only get generated if the target supports them. If one of the variants is not legal and the other is, and it is safe to do so, the other variant will be emitted. For example on AArch32 (V8), we have scalar fminnm but not fmin. Fix up a couple of tests while we're here - one now produces better code, and the other was just plain wrong to start with. llvm-svn: 245196
54 lines
1.5 KiB
LLVM
54 lines
1.5 KiB
LLVM
; RUN: llc -march=arm64 < %s | FileCheck %s
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define double @test_direct(float %in) {
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; CHECK-LABEL: test_direct:
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%cmp = fcmp olt float %in, 0.000000e+00
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%val = select i1 %cmp, float 0.000000e+00, float %in
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%longer = fpext float %val to double
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ret double %longer
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; CHECK: fmax s
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}
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define double @test_cross(float %in) {
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; CHECK-LABEL: test_cross:
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%cmp = fcmp ult float %in, 0.000000e+00
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%val = select i1 %cmp, float %in, float 0.000000e+00
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%longer = fpext float %val to double
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ret double %longer
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; CHECK: fmin s
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}
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; Same as previous, but with ordered comparison;
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; must become fminnm, not fmin.
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define double @test_cross_fail_nan(float %in) {
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; CHECK-LABEL: test_cross_fail_nan:
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%cmp = fcmp olt float %in, 0.000000e+00
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%val = select i1 %cmp, float %in, float 0.000000e+00
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%longer = fpext float %val to double
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ret double %longer
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; CHECK: fminnm s
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}
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; This isn't a min or a max, but passes the first condition for swapping the
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; results. Make sure they're put back before we resort to the normal fcsel.
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define float @test_cross_fail(float %lhs, float %rhs) {
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; CHECK-LABEL: test_cross_fail:
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%tst = fcmp une float %lhs, %rhs
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%res = select i1 %tst, float %rhs, float %lhs
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ret float %res
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; The register allocator would have to decide to be deliberately obtuse before
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; other register were used.
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; CHECK: fcsel s0, s1, s0, ne
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}
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; Make sure the transformation isn't triggered for integers
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define i64 @test_integer(i64 %in) {
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%cmp = icmp slt i64 %in, 0
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%val = select i1 %cmp, i64 0, i64 %in
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ret i64 %val
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}
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