1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
llvm-mirror/test/MC/Mips/mips2
Vasileios Kalintiris 761ce121c9 [mips] Remap move as or.
Summary:
This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or
'addu'. The use of addu/daddu instead of or as move was highlighted as a
performance issue during the analysis of a recent 64bit design. Originally
move was encoded as 'or' by binutils but was changed for the r10k cpu family
due to their pipeline which had 2 arithmetic units and a single logical unit,
and so could issue multiple (d)addu based moves at the same time but only 1
logical move.

This patch preserves the disassembly behaviour so that disassembling a old style
(d)addu move still appears as move, but assembling move always gives an or

Patch by Simon Dardis.

Reviewers: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11796

llvm-svn: 244579
2015-08-11 08:56:25 +00:00
..
invalid-mips3-wrong-error.s [mips][mips64r6] daddi is not available on MIPS64r6 2014-06-13 12:49:06 +00:00
invalid-mips3.s [mips][msa] Test basic operations for the N32 ABI too. 2015-05-05 08:48:35 +00:00
invalid-mips4-wrong-error.s [mips] Add support for COP1's Branch-On-Cond-Likely instructions 2014-10-17 14:08:28 +00:00
invalid-mips4.s [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
invalid-mips5-wrong-error.s [mips] Improve the error messages given by MipsAsmParser. 2014-09-16 15:00:52 +00:00
invalid-mips5.s [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
invalid-mips32.s [mips] SYNC $stype instruction was added in Mips32 2014-06-18 17:10:30 +00:00
invalid-mips32r2-xfail.s
invalid-mips32r2.s [mips] Marked the DI/EI instruction aliases as MIPS32r2 2014-10-16 15:23:52 +00:00
valid.s [mips] Remap move as or. 2015-08-11 08:56:25 +00:00