mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 20:51:52 +01:00
e7725047a0
I've included a fix to DAGCombiner::ForwardStoreValueToDirectLoad that I believe will prevent the previous miscompile. Original commit message: Theoretically this was done to simplify the amount of isel patterns that were needed. But it also meant a substantial number of our isel patterns have to match an explicit bitcast. By making the vXi32/vXi16/vXi8 types legal for loads, DAG combiner should be able to change the load type to rem I had to add some additional plain load instruction patterns and a few other special cases, but overall the isel table has reduced in size by ~12000 bytes. So it looks like this promotion was hurting us more than helping. I still have one crash in vector-trunc.ll that I'm hoping @RKSimon can help with. It seems to relate to using getTargetConstantFromNode on a load that was shrunk due to an extract_subvector combine after the constant pool entry was created. So we end up decoding more mask elements than the lo I'm hoping this patch will simplify the number of patterns needed to remove the and/or/xor promotion. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits, RKSimon Differential Revision: https://reviews.llvm.org/D53306 llvm-svn: 344965
56 lines
2.1 KiB
C++
56 lines
2.1 KiB
C++
//===-- X86ShuffleDecodeConstantPool.h - X86 shuffle decode -----*-C++-*---===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// Define several functions to decode x86 specific shuffle semantics using
|
|
// constants from the constant pool.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_X86_X86SHUFFLEDECODECONSTANTPOOL_H
|
|
#define LLVM_LIB_TARGET_X86_X86SHUFFLEDECODECONSTANTPOOL_H
|
|
|
|
#include "llvm/ADT/SmallVector.h"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Vector Mask Decoding
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
namespace llvm {
|
|
class Constant;
|
|
class MVT;
|
|
|
|
/// Decode a PSHUFB mask from an IR-level vector constant.
|
|
void DecodePSHUFBMask(const Constant *C, unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
/// Decode a VPERMILP variable mask from an IR-level vector constant.
|
|
void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
/// Decode a VPERMILP2 variable mask from an IR-level vector constant.
|
|
void DecodeVPERMIL2PMask(const Constant *C, unsigned MatchImm, unsigned ElSize,
|
|
unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
/// Decode a VPPERM variable mask from an IR-level vector constant.
|
|
void DecodeVPPERMMask(const Constant *C, unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
/// Decode a VPERM W/D/Q/PS/PD mask from an IR-level vector constant.
|
|
void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
/// Decode a VPERMT2 W/D/Q/PS/PD mask from an IR-level vector constant.
|
|
void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width,
|
|
SmallVectorImpl<int> &ShuffleMask);
|
|
|
|
} // llvm namespace
|
|
|
|
#endif
|