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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 14:02:52 +02:00
llvm-mirror/test/CodeGen
Eric Christopher ca7ae418a5 Check register class matching instead of width of type matching
when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.

Fixes PR10352 and rdar://9777108

llvm-svn: 135180
2011-07-14 20:13:52 +00:00
..
Alpha make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
ARM Add a testcase for r135123. 2011-07-14 06:23:09 +00:00
Blackfin more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CBackend more tests not making the jump into the brave new world. 2011-07-09 16:57:10 +00:00
CellSPU make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
CPP manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Generic Comment correction. 2011-07-12 03:39:22 +00:00
MBlaze
Mips Change the chain input of nodes that load the address of a function. This change 2011-06-24 19:01:25 +00:00
MSP430
PowerPC test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See also r134814 (test/CodeGen/X86/vector.ll). 2011-07-11 16:21:52 +00:00
PTX PTX: corrected tests that were failing 2011-06-25 19:41:17 +00:00
SPARC make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
SystemZ manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
Thumb Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
Thumb2 Improve codegen for select's: 2011-07-13 00:42:17 +00:00
X86 Check register class matching instead of width of type matching 2011-07-14 20:13:52 +00:00
XCore make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00