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76d2a77998
loading a 32bit constant into a register whose low halfword is all zeroes. We now omit the ori after the lis for the following C code: int bar(int y) { return y * 0x00F0000; } _bar: .LBB_bar_0: ; entry ; IMPLICIT_DEF lis r2, 15 mullw r3, r3, r2 blr llvm-svn: 16825 |
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.. | ||
LICENSE.TXT | ||
Makefile | ||
PowerPC.h | ||
PowerPC.td | ||
PowerPCAsmPrinter.cpp | ||
PowerPCBranchSelector.cpp | ||
PowerPCFrameInfo.h | ||
PowerPCInstrBuilder.h | ||
PowerPCInstrFormats.td | ||
PowerPCInstrInfo.h | ||
PowerPCInstrInfo.td | ||
PowerPCJITInfo.h | ||
PowerPCRegisterInfo.h | ||
PowerPCRegisterInfo.td | ||
PowerPCTargetMachine.cpp | ||
PowerPCTargetMachine.h | ||
PPC32.td | ||
PPC32CodeEmitter.cpp | ||
PPC32InstrInfo.cpp | ||
PPC32InstrInfo.h | ||
PPC32ISelSimple.cpp | ||
PPC32JITInfo.h | ||
PPC32RegisterInfo.cpp | ||
PPC32RegisterInfo.h | ||
PPC32RegisterInfo.td | ||
PPC32TargetMachine.h | ||
PPC64.td | ||
PPC64CodeEmitter.cpp | ||
PPC64InstrInfo.cpp | ||
PPC64InstrInfo.h | ||
PPC64ISelSimple.cpp | ||
PPC64JITInfo.h | ||
PPC64RegisterInfo.cpp | ||
PPC64RegisterInfo.h | ||
PPC64RegisterInfo.td | ||
PPC64TargetMachine.h | ||
README.txt |
TODO: * implement not-R0 register GPR class * fix rlwimi generation to be use-and-def * implement scheduling info * implement powerpc-64 for darwin * implement powerpc-64 for aix * use stfiwx in float->int * should hint to the branch select pass that it doesn't need to print the second unconditional branch, so we don't end up with things like: b .LBBl42__2E_expand_function_8_674 ; loopentry.24 b .LBBl42__2E_expand_function_8_42 ; NewDefault b .LBBl42__2E_expand_function_8_42 ; NewDefault Currently failing tests that should pass: * MultiSource |- Applications | `- hbd: miscompilation