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ab07da4ca9
Summary: With this change we are able to realign the stack dynamically, whenever it contains objects with alignment requirements that are larger than the alignment specified from the given ABI. We have to use the $fp register as the frame pointer when we perform dynamic stack realignment. In complex stack frames, with variably-sized objects, we reserve additionally the callee-saved register $s7 as the base pointer in order to reference locals. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8633 llvm-svn: 238829
83 lines
2.9 KiB
C++
83 lines
2.9 KiB
C++
//===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#include "Mips.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "MipsGenRegisterInfo.inc"
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namespace llvm {
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class MipsRegisterInfo : public MipsGenRegisterInfo {
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public:
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MipsRegisterInfo();
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// Mips::RA, return the number that it corresponds to (e.g. 31).
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static unsigned getRegisterNumbering(unsigned RegEnum);
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/// Get PIC indirect call register
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static unsigned getPICCallReg();
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/// Adjust the Mips stack frame.
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void adjustMipsStackFrame(MachineFunction &MF) const;
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/// Code Generation virtual methods...
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const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
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unsigned Kind) const override;
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const override;
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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CallingConv::ID) const override;
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static const uint32_t *getMips16RetHelperMask();
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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bool requiresRegisterScavenging(const MachineFunction &MF) const override;
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
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/// Stack Frame Processing Methods
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF,
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RegScavenger *RS = nullptr) const;
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// Stack realignment queries.
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bool canRealignStack(const MachineFunction &MF) const;
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bool needsStackRealignment(const MachineFunction &MF) const override;
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/// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const override;
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/// \brief Return GPR register class.
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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int64_t SPOffset) const = 0;
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};
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} // end namespace llvm
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#endif
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