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50 lines
1.6 KiB
LLVM
50 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv8-unknown-linux-unknown -mattr=-fp16 -O0 < %s | FileCheck %s
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declare fastcc half @getConstant()
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declare fastcc i1 @isEqual(half %0, half %1)
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define internal fastcc void @main() {
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; CHECK-LABEL: main:
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; CHECK: @ %bb.0: @ %Entry
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: mov r11, sp
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: mov r0, #31744
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; CHECK-NEXT: strh r0, [r11, #-2]
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; CHECK-NEXT: ldrh r0, [r11, #-2]
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; CHECK-NEXT: bl __gnu_h2f_ieee
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: vstr s0, [sp, #4] @ 4-byte Spill
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; CHECK-NEXT: bl getConstant
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; CHECK-NEXT: vmov r0, s0
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; CHECK-NEXT: bl __gnu_h2f_ieee
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: vmov r0, s0
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; CHECK-NEXT: bl __gnu_f2h_ieee
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; CHECK-NEXT: vldr s0, [sp, #4] @ 4-byte Reload
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; CHECK-NEXT: str r0, [sp, #8] @ 4-byte Spill
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; CHECK-NEXT: vmov r0, s0
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; CHECK-NEXT: bl __gnu_f2h_ieee
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; CHECK-NEXT: mov r1, r0
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; CHECK-NEXT: ldr r0, [sp, #8] @ 4-byte Reload
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; CHECK-NEXT: uxth r1, r1
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; CHECK-NEXT: vmov s0, r1
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; CHECK-NEXT: uxth r0, r0
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; CHECK-NEXT: vmov s1, r0
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; CHECK-NEXT: bl isEqual
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; CHECK-NEXT: mov sp, r11
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; CHECK-NEXT: pop {r11, pc}
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Entry:
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; First arg directly from constant
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%const = alloca half, align 2
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store half 0xH7C00, half* %const, align 2
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%arg1 = load half, half* %const, align 2
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; Second arg from fucntion return
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%arg2 = call fastcc half @getConstant()
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; Arguments should have equivalent mangling
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%result = call fastcc i1 @isEqual(half %arg1, half %arg2)
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ret void
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}
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