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llvm-mirror/test/CodeGen/PowerPC/rlwinm-zero-ext.ll
Nemanja Ivanovic 41072ed0b6 [PowerPC] Do not emit record-form rotates when record-form andi suffices
Up until Power9, the performance profile for rlwinm., rldicl. and andi. looked
more or less equivalent. However with Power9, the rotates are still 2-way
cracked whereas the and-immediate is not.

This patch just ensures that we don't emit record-form rotates when an andi.
is adequate.

As first pointed out by Carrot in https://bugs.llvm.org/show_bug.cgi?id=30833
(this patch is a fix for that PR).

Differential Revision: https://reviews.llvm.org/D43977

llvm-svn: 326736
2018-03-05 19:27:16 +00:00

58 lines
1.3 KiB
LLVM

; RUN: llc -verify-machineinstrs -O2 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
; CHECK-LABEL: test1
define i8 @test1(i32 %a) {
entry:
; CHECK-NOT: rlwinm {{{[0-9]+}}}, {{[0-9]+}}, 0, 24, 27
; CHECK: andi. [[REG:[0-9]+]], {{[0-9]+}}, 240
; CHECK-NOT: cmplwi [[REG]], 0
; CHECK: beq 0
%0 = and i32 %a, 240
%1 = icmp eq i32 %0, 0
br i1 %1, label %eq0, label %neq0
eq0:
ret i8 102
neq0:
ret i8 116
}
; CHECK-LABEL: test2
define i8 @test2(i32 %a) {
entry:
; CHECK: rlwinm [[REG:[0-9]+]], {{[0-9]+}}, 0, 28, 23
; CHECK: cmplwi [[REG]], 0
; CHECK: beq 0
%0 = and i32 %a, -241
%1 = icmp eq i32 %0, 0
br i1 %1, label %eq0, label %neq0
eq0:
ret i8 102
neq0:
ret i8 116
}
declare {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
; CHECK-LABEL: test3
define i8 @test3(i32 %a, i32 %b) {
entry:
; CHECK-NOT: rlwnm {{{[0-9]+}}}, {{[0-9]+}}, {{{[0-9]+}}}, 28, 31
; CHECK: rlwnm. [[REG:[0-9]+]], {{[0-9]+}}, 4, 28, 31
; CHECK-NOT: cmplwi [[REG]], 0
; CHECK: beq 0
%left = shl i32 %a, %b
%res = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 32, i32 %b)
%right_amount = extractvalue {i32, i1} %res, 0
%right = lshr i32 %a, %right_amount
%0 = or i32 %left, %right
%1 = and i32 %0, 15
%2 = icmp eq i32 %1, 0
br i1 %2, label %eq0, label %neq0
eq0:
ret i8 102
neq0:
ret i8 116
}