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41 lines
1.2 KiB
LLVM
41 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=pic16
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; XFAIL: *
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; This fails because PIC16 doesn't define a (xor reg, reg) pattern.
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;
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@c612.auto.a.b = internal global i1 false ; <i1*> [#uses=2]
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@c612.auto.A.b = internal global i1 false ; <i1*> [#uses=2]
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define void @c612() nounwind {
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entry:
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%tmp3.b = load i1* @c612.auto.a.b ; <i1> [#uses=1]
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%tmp3 = zext i1 %tmp3.b to i16 ; <i16> [#uses=1]
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%tmp4.b = load i1* @c612.auto.A.b ; <i1> [#uses=1]
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%tmp4 = select i1 %tmp4.b, i16 2, i16 0 ; <i16> [#uses=1]
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%cmp5 = icmp ne i16 %tmp3, %tmp4 ; <i1> [#uses=1]
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%conv7 = zext i1 %cmp5 to i8 ; <i8> [#uses=1]
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tail call void @expectWrap(i8 %conv7, i8 2)
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ret void
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}
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define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind {
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entry:
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%tobool = icmp eq i8 %boolresult, 0 ; <i1> [#uses=1]
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br i1 %tobool, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @exit(i16 1)
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unreachable
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if.end: ; preds = %entry
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ret void
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}
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define i16 @main() nounwind {
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entry:
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tail call void @c612()
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ret i16 0
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}
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declare void @exit(i16) noreturn nounwind
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