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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
llvm-mirror/test/CodeGen
Quentin Colombet 77e9397bd4 [X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>

llvm-svn: 232085
2015-03-12 19:34:12 +00:00
..
AArch64 [AArch64] Avoid going through GPRs for across-vector instructions. 2015-03-10 20:45:38 +00:00
ARM ARM: simplify and extend byval handling 2015-03-11 18:54:22 +00:00
BPF
CPP
Generic DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Hexagon Remove unused complex patterns for addressing modes on Hexagon. 2015-03-12 16:44:50 +00:00
Inputs DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Mips [mips][microMIPS] Make usage of NOT16 by code generator 2015-03-11 20:28:31 +00:00
MSP430
NVPTX [NVPTXAsmPrinter] do not print .align on function headers 2015-03-12 01:50:30 +00:00
PowerPC Add support for part-word atomics for PPC 2015-03-10 20:51:07 +00:00
R600 R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
SPARC Use the vanilla func_end symbol for .size. 2015-03-04 01:35:23 +00:00
SystemZ
Thumb DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
Thumb2 Make DataLayout Non-Optional in the Module 2015-03-04 18:43:29 +00:00
WinEH Remove some CHECK-NOT lines in favor of CHECK-NEXT 2015-03-12 01:38:48 +00:00
X86 [X86] Fix a regression introduced by r223641. 2015-03-12 19:34:12 +00:00
XCore Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation 2015-03-09 22:45:16 +00:00