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4e4ba838d9
Re-apply r276044/r279124/r305516. Fixed a problem where we would refuse to place spills as the very first instruciton of a basic block and thus artifically increase pressure (test in test/CodeGen/PowerPC/scavenging.mir:spill_at_begin) This is a variant of scavengeRegister() that works for enterBasicBlockEnd()/backward(). The benefit of the backward mode is that it is not affected by incomplete kill flags. This patch also changes PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register scavenger in backwards mode. Differential Revision: http://reviews.llvm.org/D21885 llvm-svn: 305625
87 lines
2.3 KiB
YAML
87 lines
2.3 KiB
YAML
# RUN: llc -run-pass=prologepilog -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-linux-gnu"
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define void @ScavengeForFrameWithoutOffset() { ret void }
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...
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---
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name: ScavengeForFrameWithoutOffset
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tracksRegLiveness: true
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stack:
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- { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 8 }
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body: |
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bb.0:
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liveins: %d16_d17_d18_d19
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%x0 = COPY %xzr
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%x1 = COPY %xzr
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%x2 = COPY %xzr
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%x3 = COPY %xzr
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%x4 = COPY %xzr
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%x5 = COPY %xzr
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%x6 = COPY %xzr
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%x7 = COPY %xzr
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%x8 = COPY %xzr
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%x9 = COPY %xzr
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%x10 = COPY %xzr
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%x11 = COPY %xzr
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%x12 = COPY %xzr
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%x13 = COPY %xzr
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%x14 = COPY %xzr
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%x15 = COPY %xzr
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%x16 = COPY %xzr
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%x17 = COPY %xzr
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%x18 = COPY %xzr
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%x19 = COPY %xzr
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%x20 = COPY %xzr
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%x21 = COPY %xzr
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%x22 = COPY %xzr
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%x23 = COPY %xzr
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%x24 = COPY %xzr
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%x25 = COPY %xzr
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%x26 = COPY %xzr
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%x27 = COPY %xzr
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%x28 = COPY %xzr
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%fp = COPY %xzr
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%lr = COPY %xzr
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ST1Fourv1d killed %d16_d17_d18_d19, %stack.0 :: (store 32 into %stack.0, align 8)
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; CHECK: STRXui killed %[[SCAVREG:x[0-9]+|fp|lr]], %sp, [[SPOFFSET:[0-9]+]] :: (store 8 into %stack.1)
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; CHECK-NEXT: %[[SCAVREG]] = ADDXri %sp, {{[0-9]+}}, 0
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; CHECK-NEXT: ST1Fourv1d killed %d16_d17_d18_d19, killed %[[SCAVREG]] :: (store 32 into %stack.0, align 8)
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; CHECK-NEXT: %[[SCAVREG]] = LDRXui %sp, [[SPOFFSET]] :: (load 8 from %stack.1)
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HINT 0, implicit %x0
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HINT 0, implicit %x1
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HINT 0, implicit %x2
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HINT 0, implicit %x3
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HINT 0, implicit %x4
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HINT 0, implicit %x5
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HINT 0, implicit %x6
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HINT 0, implicit %x7
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HINT 0, implicit %x8
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HINT 0, implicit %x9
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HINT 0, implicit %x10
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HINT 0, implicit %x11
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HINT 0, implicit %x12
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HINT 0, implicit %x13
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HINT 0, implicit %x14
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HINT 0, implicit %x15
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HINT 0, implicit %x16
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HINT 0, implicit %x17
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HINT 0, implicit %x18
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HINT 0, implicit %x19
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HINT 0, implicit %x20
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HINT 0, implicit %x21
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HINT 0, implicit %x22
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HINT 0, implicit %x23
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HINT 0, implicit %x24
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HINT 0, implicit %x25
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HINT 0, implicit %x26
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HINT 0, implicit %x27
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HINT 0, implicit %x28
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HINT 0, implicit %fp
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HINT 0, implicit %lr
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RET_ReallyLR
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...
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