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4f44d0e3e0
We don't use it and it was removed in gfx9, and the encoding bit repurposed. Additionally actually using it requires changing the output register class, which wasn't done anyway. llvm-svn: 302814
129 lines
3.8 KiB
YAML
129 lines
3.8 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass si-insert-waits %s -o - | FileCheck %s
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--- |
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define amdgpu_kernel void @flat_zero_waitcnt(i32 addrspace(1)* %global4,
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<4 x i32> addrspace(1)* %global16,
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i32 addrspace(4)* %flat4,
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<4 x i32> addrspace(4)* %flat16) {
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ret void
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}
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define amdgpu_kernel void @single_fallthrough_successor_no_end_block_wait() {
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ret void
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}
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define amdgpu_kernel void @single_branch_successor_not_next_block() {
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ret void
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}
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...
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---
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# CHECK-LABEL: name: flat_zero_waitcnt
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# CHECK-LABEL: bb.0:
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# CHECK: FLAT_LOAD_DWORD
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# CHECK: FLAT_LOAD_DWORDX4
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# Global loads will return in order so we should:
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# s_waitcnt vmcnt(1) lgkmcnt(0)
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# CHECK-NEXT: S_WAITCNT 113
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# CHECK-LABEL: bb.1:
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# CHECK: FLAT_LOAD_DWORD
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# CHECK: S_WAITCNT 3952
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# CHECK: FLAT_LOAD_DWORDX4
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# The first load has no mem operand, so we should assume it accesses the flat
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# address space.
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# s_waitcnt vmcnt(0) lgkmcnt(0)
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# CHECK-NEXT: S_WAITCNT 127
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# CHECK-LABEL: bb.2:
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# CHECK: FLAT_LOAD_DWORD
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# CHECK: S_WAITCNT 3952
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# CHECK: FLAT_LOAD_DWORDX4
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# One outstand loads access the flat address space.
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# s_waitcnt vmcnt(0) lgkmcnt(0)
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# CHECK-NEXT: S_WAITCNT 127
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name: flat_zero_waitcnt
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body: |
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bb.0:
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successors: %bb.1
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%vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, implicit %exec, implicit %flat_scr :: (load 4 from %ir.global4)
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%vgpr3_vgpr4_vgpr5_vgpr6 = FLAT_LOAD_DWORDX4 %vgpr7_vgpr8, 0, 0, implicit %exec, implicit %flat_scr :: (load 16 from %ir.global16)
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%vgpr0 = V_MOV_B32_e32 %vgpr1, implicit %exec
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2
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%vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, implicit %exec, implicit %flat_scr
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%vgpr3_vgpr4_vgpr5_vgpr6 = FLAT_LOAD_DWORDX4 %vgpr7_vgpr8, 0, 0, implicit %exec, implicit %flat_scr :: (load 16 from %ir.global16)
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%vgpr0 = V_MOV_B32_e32 %vgpr1, implicit %exec
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S_BRANCH %bb.2
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bb.2:
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%vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, implicit %exec, implicit %flat_scr :: (load 4 from %ir.flat4)
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%vgpr3_vgpr4_vgpr5_vgpr6 = FLAT_LOAD_DWORDX4 %vgpr7_vgpr8, 0, 0, implicit %exec, implicit %flat_scr :: (load 16 from %ir.flat16)
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%vgpr0 = V_MOV_B32_e32 %vgpr1, implicit %exec
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S_ENDPGM
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...
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---
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# There is only a single fallthrough successor block, so there's no
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# need to wait immediately.
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# CHECK-LABEL: name: single_fallthrough_successor_no_end_block_wait
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# CHECK: %vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2
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# CHECK-NOT: S_WAITCNT
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# CHECK: bb.1:
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# CHECK-NEXT: V_LSHLREV_B64
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# CHECK-NEXT: S_WAITCNT 112
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# CHECK-NEXT: FLAT_STORE_DWORD
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name: single_fallthrough_successor_no_end_block_wait
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body: |
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bb.0:
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successors: %bb.1
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%vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, implicit %exec, implicit %flat_scr
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bb.1:
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%vgpr3_vgpr4 = V_LSHLREV_B64 4, %vgpr7_vgpr8, implicit %exec
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FLAT_STORE_DWORD %vgpr3_vgpr4, %vgpr0, 0, 0, implicit %exec, implicit %flat_scr
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S_ENDPGM
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...
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---
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# The block has a single predecessor with a single successor, but it
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# is not the next block so it's non-obvious that the wait is not needed.
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# CHECK-LABEL: name: single_branch_successor_not_next_block
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# CHECK: %vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2
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# CHECK-NEXT: S_WAITCNT 112
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# CHECK: bb.1
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# CHECK-NEXT: FLAT_STORE_DWORD
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# CHECK-NEXT: S_ENDPGM
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# CHECK: bb.2:
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# CHECK-NEXT: V_LSHLREV_B64
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# CHECK-NEXT: FLAT_STORE_DWORD
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name: single_branch_successor_not_next_block
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body: |
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bb.0:
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successors: %bb.2
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%vgpr0 = FLAT_LOAD_DWORD %vgpr1_vgpr2, 0, 0, implicit %exec, implicit %flat_scr
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S_BRANCH %bb.2
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bb.1:
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FLAT_STORE_DWORD %vgpr8_vgpr9, %vgpr10, 0, 0, implicit %exec, implicit %flat_scr
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S_ENDPGM
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bb.2:
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%vgpr3_vgpr4 = V_LSHLREV_B64 4, %vgpr7_vgpr8, implicit %exec
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FLAT_STORE_DWORD %vgpr3_vgpr4, %vgpr0, 0, 0, implicit %exec, implicit %flat_scr
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S_ENDPGM
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...
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