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2b851af232
reserved physreg in RegisterCoalescer. Previously, we only checked for clobbers when merging into a READ of the physreg, but not when merging from a WRITE to the physreg. Differential Revision: https://reviews.llvm.org/D28527 llvm-svn: 291942
36 lines
1002 B
LLVM
36 lines
1002 B
LLVM
; RUN: llc -march=sparc < %s | FileCheck %s
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;; Verify that g1 (the output of first asm) is properly understood to
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;; be clobbered by the call instruction, and moved out of the way
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;; before it. (NOTE: remember delay slot; mov executes before call)
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; CHECK-LABEL: test1:
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; CHECK: ta 9
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; CHECK: call dosomething
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; CHECK: mov %g1, %i0
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define i32 @test1() nounwind {
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entry:
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%0 = tail call i32 asm sideeffect "ta $1", "={r1},i"(i32 9) nounwind
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tail call void @dosomething() nounwind
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ret i32 %0
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}
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;; Also check using the value.
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; CHECK-LABEL: test2:
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; CHECK: ta 9
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; CHECK: call dosomething
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; CHECK: mov %g1, %i0
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; CHECK: mov %i0, %g1
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; CHECK: ta 10
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define void @test2() local_unnamed_addr nounwind {
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entry:
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%0 = tail call i32 asm sideeffect "ta $1", "={r1},i"(i32 9) nounwind
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tail call void @dosomething() nounwind
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tail call void asm sideeffect "ta $0", "i,{r1}"(i32 10, i32 %0) nounwind
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ret void
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}
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declare void @dosomething() local_unnamed_addr nounwind
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