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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 14:33:02 +02:00
llvm-mirror/test/CodeGen
Matt Arsenault 78ebf53d3b Add target hook to allow merging stores of nonzero constants
On GPU targets, materializing constants is cheap and stores are
expensive, so only doing this for zero vectors was silly.

Most of the new testcases aren't optimally merged, and are for
later improvements.

llvm-svn: 238108
2015-05-24 00:51:27 +00:00
..
AArch64 [AArch64][CGP] Sink zext feeding stxr/stlxr into the same block. 2015-05-22 21:37:17 +00:00
ARM Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions. 2015-05-23 01:14:08 +00:00
BPF
CPP
Generic Revert r237954, "Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format)." 2015-05-22 07:17:07 +00:00
Hexagon [Hexagon] Generate hardware loop for a vectorized loop 2015-05-14 20:36:19 +00:00
Inputs
Mips Revert r237789 - [mips] The naming convention for private labels is ABI dependant. 2015-05-20 14:18:59 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Fix fast-isel when compare is split from branch 2015-05-23 12:18:10 +00:00
R600 Add target hook to allow merging stores of nonzero constants 2015-05-24 00:51:27 +00:00
SPARC Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb
Thumb2 Revert r237590, "ARM: allow jump tables to be placed as constant islands." 2015-05-21 23:20:55 +00:00
WinEH [WinEH] C++ EH state numbering fixes 2015-05-20 23:22:24 +00:00
X86 Remove unnecessary command line option "-disable-fp-elim". 2015-05-23 00:31:56 +00:00
XCore