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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen
Sam Parker 83f00e2ac4 [DAGCombine] Fix ReduceLoadWidth for shifted offsets
ReduceLoadWidth can trigger using a shifted mask is used and this
requires that the function return a shl node to correct for the
offset. However, the way that this was implemented meant that the
returned result could be an existing node, which would be incorrect.
This fixes the method of inserting the new node and replacing uses.

Differential Revision: https://reviews.llvm.org/D50432

llvm-svn: 351310
2019-01-16 08:40:12 +00:00
..
AArch64 [GISel]: Add support for CSEing continuously during GISel passes. 2019-01-16 00:40:37 +00:00
AMDGPU AMDGPU: Raise the priority of MAD24 in instruction selection. 2019-01-15 23:12:36 +00:00
ARC
ARM [DAGCombine] Fix ReduceLoadWidth for shifted offsets 2019-01-16 08:40:12 +00:00
AVR
BPF
Generic
Hexagon Remove irrelevant references to legacy git repositories from 2019-01-15 16:18:52 +00:00
Inputs
Lanai
Mips
MIR
MSP430
NVPTX
PowerPC Remove irrelevant references to legacy git repositories from 2019-01-15 16:18:52 +00:00
RISCV
SPARC
SystemZ Remove irrelevant references to legacy git repositories from 2019-01-15 16:18:52 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] Expand SIMD shifts while V8's implementation disagrees 2019-01-15 02:16:03 +00:00
WinCFGuard
WinEH [EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp 2019-01-16 00:37:13 +00:00
X86 [EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp 2019-01-16 00:37:13 +00:00
XCore