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https://github.com/RPCS3/llvm-mirror.git
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be7810833d
Add simple pass for removing redundant vsetvli instructions within a basic block. This handles the case where the AVL register and VTYPE immediate are the same and no other instructions that change VTYPE or VL are between them. There are going to be more opportunities for improvement in this space as we development more complex tests. Differential Revision: https://reviews.llvm.org/D92679
65 lines
1.7 KiB
CMake
65 lines
1.7 KiB
CMake
add_llvm_component_group(RISCV)
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set(LLVM_TARGET_DEFINITIONS RISCV.td)
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tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM RISCVGenCompressInstEmitter.inc -gen-compress-inst-emitter)
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tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler)
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tablegen(LLVM RISCVGenGlobalISel.inc -gen-global-isel)
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tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM RISCVGenRegisterBank.inc -gen-register-bank)
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tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM RISCVGenSearchableTables.inc -gen-searchable-tables)
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tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget)
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add_public_tablegen_target(RISCVCommonTableGen)
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add_llvm_target(RISCVCodeGen
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RISCVAsmPrinter.cpp
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RISCVCallLowering.cpp
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RISCVCleanupVSETVLI.cpp
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RISCVExpandAtomicPseudoInsts.cpp
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RISCVExpandPseudoInsts.cpp
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RISCVFrameLowering.cpp
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RISCVInstrInfo.cpp
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RISCVInstructionSelector.cpp
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RISCVISelDAGToDAG.cpp
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RISCVISelLowering.cpp
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RISCVLegalizerInfo.cpp
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RISCVMCInstLower.cpp
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RISCVMergeBaseOffset.cpp
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RISCVRegisterBankInfo.cpp
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RISCVRegisterInfo.cpp
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RISCVSubtarget.cpp
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RISCVTargetMachine.cpp
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RISCVTargetObjectFile.cpp
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RISCVTargetTransformInfo.cpp
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LINK_COMPONENTS
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Analysis
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AsmPrinter
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Core
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CodeGen
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MC
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RISCVDesc
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RISCVInfo
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RISCVUtils
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SelectionDAG
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Support
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Target
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GlobalISel
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ADD_TO_COMPONENT
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RISCV
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)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(TargetInfo)
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add_subdirectory(Utils)
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