RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
Code Issues Projects Releases Wiki Activity
797648f330
llvm-mirror/lib/Target/RISCV/Utils
History
Craig Topper 590b88c6f9 [RISCV] Add intrinsics for vsetvli instruction 
This patch adds two IR intrinsics for vsetvli instruction. One to set the vector length to a user specified value and one to set it to vlmax. The vlmax uses the X0 source register encoding.

Clang builtins will follow in a separate patch

Differential Revision: https://reviews.llvm.org/D92973
2020-12-18 12:10:09 -08:00
..
CMakeLists.txt
RISCVBaseInfo.cpp [RISCV] Add intrinsics for vsetvli instruction 2020-12-18 12:10:09 -08:00
RISCVBaseInfo.h [RISCV] Add intrinsics for vsetvli instruction 2020-12-18 12:10:09 -08:00
RISCVMatInt.cpp
RISCVMatInt.h