1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/docs/AMDGPU
Dmitry Preobrazhensky 4132e08676 [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- updated description of gfx906 and gfx908;
- added description of gfx1011 and gfx1012 subtargets.
2020-02-07 16:23:46 +03:00
..
AMDGPUAsmGFX7.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX8.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX9.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX10.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX900.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX904.rst [llvm] NFC: fix trivial typos in documents 2020-01-22 11:32:51 +08:00
AMDGPUAsmGFX906.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
AMDGPUAsmGFX908.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
AMDGPUAsmGFX1011.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx7_addr_buf.rst
gfx7_addr_ds.rst
gfx7_addr_flat.rst
gfx7_addr_mimg.rst
gfx7_attr.rst
gfx7_base_smem_addr.rst
gfx7_base_smem_buf.rst
gfx7_bimm16.rst
gfx7_bimm32.rst
gfx7_data_buf_atomic32.rst
gfx7_data_buf_atomic64.rst
gfx7_data_buf_atomic128.rst
gfx7_data_mimg_atomic_cmp.rst
gfx7_data_mimg_atomic_reg.rst
gfx7_data_mimg_store.rst
gfx7_dst_buf_64.rst
gfx7_dst_buf_96.rst
gfx7_dst_buf_128.rst
gfx7_dst_buf_lds.rst
gfx7_dst_flat_atomic32.rst
gfx7_dst_flat_atomic64.rst
gfx7_dst_mimg_gather4.rst
gfx7_dst_mimg_regular.rst
gfx7_fimm32.rst
gfx7_hwreg.rst
gfx7_label.rst
gfx7_mod.rst
gfx7_msg.rst
gfx7_offset_buf.rst
gfx7_offset_smem.rst
gfx7_opt.rst
gfx7_param.rst
gfx7_ret.rst
gfx7_rsrc_buf.rst
gfx7_rsrc_mimg.rst
gfx7_samp_mimg.rst
gfx7_sdst32_0.rst
gfx7_sdst32_1.rst
gfx7_sdst32_2.rst
gfx7_sdst64_0.rst
gfx7_sdst64_1.rst
gfx7_sdst128_0.rst
gfx7_sdst256_0.rst
gfx7_sdst512_0.rst
gfx7_simm16.rst
gfx7_src32_0.rst
gfx7_src32_1.rst
gfx7_src32_2.rst
gfx7_src32_3.rst
gfx7_src32_4.rst
gfx7_src32_5.rst
gfx7_src32_6.rst
gfx7_src64_0.rst
gfx7_src64_1.rst
gfx7_src64_2.rst
gfx7_src_exp.rst
gfx7_ssrc32_0.rst
gfx7_ssrc32_1.rst
gfx7_ssrc32_2.rst
gfx7_ssrc32_3.rst
gfx7_ssrc32_4.rst
gfx7_ssrc32_5.rst
gfx7_ssrc32_6.rst
gfx7_ssrc64_0.rst
gfx7_ssrc64_1.rst
gfx7_ssrc64_2.rst
gfx7_ssrc64_3.rst
gfx7_tgt.rst
gfx7_type_dev.rst
gfx7_uimm16.rst
gfx7_vcc_64.rst
gfx7_vdata32_0.rst
gfx7_vdata64_0.rst
gfx7_vdata96_0.rst
gfx7_vdata128_0.rst
gfx7_vdst32_0.rst
gfx7_vdst64_0.rst
gfx7_vdst96_0.rst
gfx7_vdst128_0.rst
gfx7_vsrc32_0.rst
gfx7_vsrc32_1.rst
gfx7_vsrc64_0.rst
gfx7_vsrc128_0.rst
gfx7_waitcnt.rst
gfx8_addr_buf.rst
gfx8_addr_ds.rst
gfx8_addr_flat.rst
gfx8_addr_mimg.rst
gfx8_attr.rst
gfx8_base_smem_addr.rst
gfx8_base_smem_buf.rst
gfx8_bimm16.rst
gfx8_bimm32.rst
gfx8_data_buf_atomic32.rst
gfx8_data_buf_atomic64.rst
gfx8_data_buf_atomic128.rst
gfx8_data_buf_d16_32.rst
gfx8_data_buf_d16_64.rst
gfx8_data_buf_d16_96.rst
gfx8_data_buf_d16_128.rst
gfx8_data_mimg_atomic_cmp.rst
gfx8_data_mimg_atomic_reg.rst
gfx8_data_mimg_store_d16.rst
gfx8_data_mimg_store.rst
gfx8_dst_buf_64.rst
gfx8_dst_buf_96.rst
gfx8_dst_buf_128.rst
gfx8_dst_buf_d16_32.rst
gfx8_dst_buf_d16_64.rst
gfx8_dst_buf_d16_96.rst
gfx8_dst_buf_d16_128.rst
gfx8_dst_buf_lds.rst
gfx8_dst_flat_atomic32.rst
gfx8_dst_flat_atomic64.rst
gfx8_dst_mimg_gather4.rst
gfx8_dst_mimg_regular_d16.rst
gfx8_dst_mimg_regular.rst
gfx8_fimm16.rst
gfx8_fimm32.rst
gfx8_hwreg.rst
gfx8_imask.rst
gfx8_label.rst
gfx8_mod_dpp_sdwa_abs_neg.rst
gfx8_mod_sdwa_sext.rst
gfx8_mod_vop3_abs_neg.rst
gfx8_msg.rst
gfx8_offset_buf.rst
gfx8_offset_smem_load.rst
gfx8_offset_smem_store.rst
gfx8_opt.rst
gfx8_param.rst
gfx8_perm_smem.rst
gfx8_ret.rst
gfx8_rsrc_buf.rst
gfx8_rsrc_mimg.rst
gfx8_samp_mimg.rst
gfx8_sdata32_0.rst
gfx8_sdata64_0.rst
gfx8_sdata128_0.rst
gfx8_sdst32_0.rst
gfx8_sdst32_1.rst
gfx8_sdst32_2.rst
gfx8_sdst64_0.rst
gfx8_sdst64_1.rst
gfx8_sdst128_0.rst
gfx8_sdst256_0.rst
gfx8_sdst512_0.rst
gfx8_simm16.rst
gfx8_src32_0.rst
gfx8_src32_1.rst
gfx8_src32_2.rst
gfx8_src32_3.rst
gfx8_src64_0.rst
gfx8_src64_1.rst
gfx8_src_exp.rst
gfx8_ssrc32_0.rst
gfx8_ssrc32_1.rst
gfx8_ssrc32_2.rst
gfx8_ssrc32_3.rst
gfx8_ssrc32_4.rst
gfx8_ssrc64_0.rst
gfx8_ssrc64_1.rst
gfx8_ssrc64_2.rst
gfx8_ssrc64_3.rst
gfx8_tgt.rst
gfx8_type_dev.rst
gfx8_uimm16.rst
gfx8_vcc_64.rst
gfx8_vdata32_0.rst
gfx8_vdata64_0.rst
gfx8_vdata96_0.rst
gfx8_vdata128_0.rst
gfx8_vdst32_0.rst
gfx8_vdst64_0.rst
gfx8_vdst96_0.rst
gfx8_vdst128_0.rst
gfx8_vsrc32_0.rst
gfx8_vsrc32_1.rst
gfx8_vsrc64_0.rst
gfx8_vsrc128_0.rst
gfx8_waitcnt.rst
gfx9_addr_buf.rst
gfx9_addr_ds.rst
gfx9_addr_flat.rst
gfx9_addr_mimg.rst
gfx9_attr.rst
gfx9_base_smem_addr.rst
gfx9_base_smem_buf.rst
gfx9_base_smem_scratch.rst
gfx9_bimm16.rst
gfx9_bimm32.rst
gfx9_data_buf_atomic32.rst
gfx9_data_buf_atomic64.rst
gfx9_data_buf_atomic128.rst
gfx9_data_mimg_atomic_cmp.rst
gfx9_data_mimg_atomic_reg.rst
gfx9_data_mimg_store_d16.rst
gfx9_data_mimg_store.rst
gfx9_data_smem_atomic32.rst
gfx9_data_smem_atomic64.rst
gfx9_data_smem_atomic128.rst
gfx9_dst_buf_32.rst
gfx9_dst_buf_64.rst
gfx9_dst_buf_96.rst
gfx9_dst_buf_128.rst
gfx9_dst_buf_lds.rst
gfx9_dst_flat_atomic32.rst
gfx9_dst_flat_atomic64.rst
gfx9_dst_mimg_gather4.rst
gfx9_dst_mimg_regular_d16.rst
gfx9_dst_mimg_regular.rst
gfx9_fimm16.rst
gfx9_fimm32.rst
gfx9_hwreg.rst
gfx9_imask.rst
gfx9_label.rst
gfx9_mod_dpp_sdwa_abs_neg.rst
gfx9_mod_sdwa_sext.rst
gfx9_mod_vop3_abs_neg.rst
gfx9_msg.rst
gfx9_offset_buf.rst
gfx9_offset_smem_buf.rst
gfx9_offset_smem_plain.rst
gfx9_opt.rst
gfx9_param.rst
gfx9_perm_smem.rst
gfx9_ret.rst
gfx9_rsrc_buf.rst
gfx9_rsrc_mimg.rst
gfx9_saddr_flat_global.rst
gfx9_saddr_flat_scratch.rst
gfx9_samp_mimg.rst
gfx9_sdata32_0.rst
gfx9_sdata64_0.rst
gfx9_sdata128_0.rst
gfx9_sdst32_0.rst
gfx9_sdst32_1.rst
gfx9_sdst32_2.rst
gfx9_sdst64_0.rst
gfx9_sdst64_1.rst
gfx9_sdst128_0.rst
gfx9_sdst256_0.rst
gfx9_sdst512_0.rst
gfx9_simm16.rst
gfx9_src32_0.rst
gfx9_src32_1.rst
gfx9_src32_2.rst
gfx9_src32_3.rst
gfx9_src64_0.rst
gfx9_src64_1.rst
gfx9_src_exp.rst
gfx9_ssrc32_0.rst
gfx9_ssrc32_1.rst
gfx9_ssrc32_2.rst
gfx9_ssrc32_3.rst
gfx9_ssrc32_4.rst
gfx9_ssrc64_0.rst
gfx9_ssrc64_1.rst
gfx9_ssrc64_2.rst
gfx9_ssrc64_3.rst
gfx9_tgt.rst
gfx9_type_dev.rst
gfx9_uimm16.rst
gfx9_vaddr_flat_global.rst
gfx9_vaddr_flat_scratch.rst
gfx9_vcc_64.rst
gfx9_vdata32_0.rst
gfx9_vdata64_0.rst
gfx9_vdata96_0.rst
gfx9_vdata128_0.rst
gfx9_vdst32_0.rst
gfx9_vdst64_0.rst
gfx9_vdst96_0.rst
gfx9_vdst128_0.rst
gfx9_vsrc32_0.rst
gfx9_vsrc32_1.rst
gfx9_vsrc64_0.rst
gfx9_vsrc128_0.rst
gfx9_waitcnt.rst
gfx10_addr_buf.rst
gfx10_addr_ds.rst
gfx10_addr_flat.rst
gfx10_addr_mimg.rst
gfx10_attr.rst
gfx10_base_smem_addr.rst
gfx10_base_smem_buf.rst
gfx10_base_smem_scratch.rst
gfx10_bimm16.rst
gfx10_bimm32.rst
gfx10_data_buf_atomic32.rst
gfx10_data_buf_atomic64.rst
gfx10_data_buf_atomic128.rst
gfx10_data_mimg_atomic_cmp.rst
gfx10_data_mimg_atomic_reg.rst
gfx10_data_mimg_store_d16.rst
gfx10_data_mimg_store.rst
gfx10_data_smem_atomic32.rst
gfx10_data_smem_atomic64.rst
gfx10_data_smem_atomic128.rst
gfx10_dst_buf_32.rst
gfx10_dst_buf_64.rst
gfx10_dst_buf_96.rst
gfx10_dst_buf_128.rst
gfx10_dst_buf_lds.rst
gfx10_dst_flat_atomic32.rst
gfx10_dst_flat_atomic64.rst
gfx10_dst_mimg_gather4.rst
gfx10_dst_mimg_regular_d16.rst
gfx10_dst_mimg_regular.rst
gfx10_fimm16.rst
gfx10_fimm32.rst
gfx10_hwreg.rst
gfx10_label.rst
gfx10_mad_type_dev.rst
gfx10_mod_dpp_sdwa_abs_neg.rst
gfx10_mod_sdwa_sext.rst
gfx10_mod_vop3_abs_neg.rst
gfx10_msg.rst
gfx10_offset_buf.rst
gfx10_offset_smem_buf.rst
gfx10_offset_smem_plain.rst
gfx10_opt.rst
gfx10_param.rst
gfx10_perm_smem.rst
gfx10_ret.rst
gfx10_rsrc_buf.rst
gfx10_rsrc_mimg.rst
gfx10_saddr_flat_global.rst
gfx10_saddr_flat_scratch.rst
gfx10_samp_mimg.rst
gfx10_sdata32_0.rst
gfx10_sdata64_0.rst
gfx10_sdata128_0.rst
gfx10_sdst32_0.rst
gfx10_sdst32_1.rst
gfx10_sdst32_2.rst
gfx10_sdst64_0.rst
gfx10_sdst64_1.rst
gfx10_sdst128_0.rst
gfx10_sdst256_0.rst
gfx10_sdst512_0.rst
gfx10_simm16.rst
gfx10_src32_0.rst
gfx10_src32_1.rst
gfx10_src32_2.rst
gfx10_src32_3.rst
gfx10_src64_0.rst
gfx10_src_exp.rst
gfx10_ssrc32_0.rst
gfx10_ssrc32_1.rst
gfx10_ssrc32_2.rst
gfx10_ssrc32_3.rst
gfx10_ssrc32_4.rst
gfx10_ssrc32_5.rst
gfx10_ssrc64_0.rst
gfx10_ssrc64_1.rst
gfx10_tgt.rst
gfx10_type_dev.rst
gfx10_uimm16.rst
gfx10_vaddr_flat_global.rst
gfx10_vaddr_flat_scratch.rst
gfx10_vcc_32.rst
gfx10_vdata32_0.rst
gfx10_vdata64_0.rst
gfx10_vdata96_0.rst
gfx10_vdata128_0.rst
gfx10_vdst32_0.rst
gfx10_vdst64_0.rst
gfx10_vdst96_0.rst
gfx10_vdst128_0.rst
gfx10_vsrc32_0.rst
gfx10_vsrc32_1.rst
gfx10_vsrc64_0.rst
gfx10_vsrc128_0.rst
gfx10_waitcnt.rst
gfx10_wsdst.rst
gfx10_wssrc.rst
gfx900_mad_type_dev.rst
gfx900_mod_vop3_abs_neg.rst
gfx900_src32_0.rst
gfx900_src32_1.rst
gfx900_vdst32_0.rst
gfx904_mad_type_dev.rst
gfx904_mod_vop3_abs_neg.rst
gfx904_src32_0.rst
gfx904_src32_1.rst
gfx904_vdst32_0.rst
gfx906_mad_type_dev.rst
gfx906_mod_dpp_sdwa_abs_neg.rst
gfx906_mod_sdwa_sext.rst
gfx906_mod_vop3_abs_neg.rst
gfx906_src32_0.rst
gfx906_src32_1.rst
gfx906_src32_2.rst
gfx906_type_dev.rst
gfx906_vdst32_0.rst
gfx906_vsrc32_0.rst
gfx908_addr_buf.rst
gfx908_adst32_0.rst
gfx908_adst128_0.rst
gfx908_adst512_0.rst
gfx908_adst1024_0.rst
gfx908_asrc32_0.rst
gfx908_asrc128_0.rst
gfx908_asrc512_0.rst
gfx908_asrc1024_0.rst
gfx908_data_buf_atomic32.rst
gfx908_dst_flat_atomic32.rst
gfx908_mad_type_dev.rst
gfx908_mod_dpp_sdwa_abs_neg.rst
gfx908_mod_sdwa_sext.rst
gfx908_mod_vop3_abs_neg.rst
gfx908_offset_buf.rst
gfx908_opt.rst
gfx908_ret.rst
gfx908_rsrc_buf.rst
gfx908_saddr_flat_global.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx908_src32_0.rst
gfx908_src32_1.rst
gfx908_src32_2.rst
gfx908_src32_3.rst
gfx908_type_dev.rst
gfx908_vaddr_flat_global.rst
gfx908_vasrc32_0.rst
gfx908_vasrc64_0.rst
gfx908_vdata32_0.rst
gfx908_vdst32_0.rst
gfx908_vsrc32_0.rst
gfx1011_src32_0.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx1011_src32_1.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx1011_type_dev.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx1011_vdst32_0.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00
gfx1011_vsrc32_0.rst [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 2020-02-07 16:23:46 +03:00