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539ee65110
This adds MC support for the crypto instructions that were made optional extensions in Armv8.2-A (AArch64 only). Differential Revision: https://reviews.llvm.org/D49370 llvm-svn: 338010
69 lines
1.9 KiB
ArmAsm
69 lines
1.9 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64-linux-gnu %s 2> %t > /dev/null
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// RUN: FileCheck %s < %t
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.cpu invalid
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// CHECK: error: unknown CPU name
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.cpu generic+wibble+nowobble
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// CHECK: :[[@LINE-1]]:18: error: unsupported architectural extension
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// CHECK: :[[@LINE-2]]:25: error: unsupported architectural extension
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.cpu generic+nofp
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fminnm d0, d0, d1
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// CHECK: error: instruction requires: fp-armv8
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// CHECK-NEXT: fminnm d0, d0, d1
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// CHECK-NEXT: ^
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.cpu generic+nosimd
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addp v0.4s, v0.4s, v0.4s
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// CHECK: error: instruction requires: neon
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// CHECK-NEXT: addp v0.4s, v0.4s, v0.4s
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// CHECK-NEXT: ^
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.cpu generic+nocrc
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crc32cx w0, w1, x3
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// CHECK: error: instruction requires: crc
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// CHECK-NEXT: crc32cx w0, w1, x3
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// CHECK-NEXT: ^
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.cpu generic+nocrypto+crc
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aesd v0.16b, v2.16b
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// CHECK: error: instruction requires: aes
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// CHECK-NEXT: aesd v0.16b, v2.16b
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// CHECK-NEXT: ^
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.cpu generic+nolse
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casa w5, w7, [x20]
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// CHECK: error: instruction requires: lse
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// CHECK-NEXT: casa w5, w7, [x20]
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// CHECK-NEXT: ^
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.cpu generic+v8.1-a
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// CHECK: error: unsupported architectural extension
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// CHECK-NEXT: .cpu generic+v8.1-a
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// CHECK-NEXT: ^
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.cpu generic+noaes
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aese v0.16b, v1.16b
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// CHECK: error: instruction requires: aes
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// CHECK-NEXT: aese v0.16b, v1.16b
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// CHECK-NEXT: ^
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.cpu generic+nosha2
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sha1h s0, s1
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// CHECK: error: instruction requires: sha2
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// CHECK-NEXT: sha1h s0, s1
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// CHECK-NEXT: ^
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.cpu generic+nosha3
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sha512h q0, q1, v2.2d
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// CHECK: error: instruction requires: sha3
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// CHECK-NEXT: sha512h q0, q1, v2.2d
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// CHECK-NEXT: ^
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.cpu generic+nosm4
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sm4e v2.4s, v15.4s
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// CHECK: error: instruction requires: sm4
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// CHECK-NEXT: sm4e v2.4s, v15.4s
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// CHECK-NEXT: ^
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