mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-25 05:52:53 +02:00
27b8897111
This patch is part of the work to make PPCLoopDataPrefetch target-independent (http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758). Obviously the pass still only used from PPC at this point. Subsequent patches will start driving this from ARM64 as well. Due to the previous patch most lines should show up as moved lines. llvm-svn: 261265
48 lines
1.3 KiB
CMake
48 lines
1.3 KiB
CMake
set(LLVM_TARGET_DEFINITIONS PPC.td)
|
|
|
|
tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
|
|
tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
|
|
tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
|
|
tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
|
|
tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
|
|
tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
|
|
tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
|
|
tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
|
|
tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
|
|
tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
|
|
add_public_tablegen_target(PowerPCCommonTableGen)
|
|
|
|
add_llvm_target(PowerPCCodeGen
|
|
PPCBoolRetToInt.cpp
|
|
PPCAsmPrinter.cpp
|
|
PPCBranchSelector.cpp
|
|
PPCCTRLoops.cpp
|
|
PPCHazardRecognizers.cpp
|
|
PPCInstrInfo.cpp
|
|
PPCISelDAGToDAG.cpp
|
|
PPCISelLowering.cpp
|
|
PPCEarlyReturn.cpp
|
|
PPCFastISel.cpp
|
|
PPCFrameLowering.cpp
|
|
PPCLoopPreIncPrep.cpp
|
|
PPCMCInstLower.cpp
|
|
PPCMachineFunctionInfo.cpp
|
|
PPCMIPeephole.cpp
|
|
PPCRegisterInfo.cpp
|
|
PPCSubtarget.cpp
|
|
PPCTargetMachine.cpp
|
|
PPCTargetObjectFile.cpp
|
|
PPCTargetTransformInfo.cpp
|
|
PPCTOCRegDeps.cpp
|
|
PPCTLSDynamicCall.cpp
|
|
PPCVSXCopy.cpp
|
|
PPCVSXFMAMutate.cpp
|
|
PPCVSXSwapRemoval.cpp
|
|
)
|
|
|
|
add_subdirectory(AsmParser)
|
|
add_subdirectory(Disassembler)
|
|
add_subdirectory(InstPrinter)
|
|
add_subdirectory(TargetInfo)
|
|
add_subdirectory(MCTargetDesc)
|