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7a5e15697d
The intrinsic target prefix should match the target name as it appears in the triple. This is not yet complete, but gets most of the important ones. llvm.AMDGPU.* intrinsics used by mesa and libclc are still handled for compatability for now. llvm-svn: 258557
24 lines
1.0 KiB
LLVM
24 lines
1.0 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
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declare double @llvm.amdgcn.rsq.clamped.f64(double) nounwind readnone
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; FUNC-LABEL: {{^}}rsq_clamped_f64:
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; SI: v_rsq_clamp_f64_e32
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; VI: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[2:3]
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; TODO: this constant should be folded:
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; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1
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; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff
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; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]]
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; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
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; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff
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; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]]
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; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW2]]:[[HIGH2]]]
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define void @rsq_clamped_f64(double addrspace(1)* %out, double %src) nounwind {
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%rsq_clamped = call double @llvm.amdgcn.rsq.clamped.f64(double %src) nounwind readnone
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store double %rsq_clamped, double addrspace(1)* %out, align 8
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ret void
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}
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