RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 05:52:53 +02:00
Code Issues Projects Releases Wiki Activity
7abb03febb
llvm-mirror/test/CodeGen
History
Simon Pilgrim d1894c7f7a [X86][AVX] Fixed issue where a long chain of shuffles could attempt to combine to a single (illegal) PSHUFB instruction. 
Its not enough that we test for SSSE3 - that's only OK for 128-bit vectors - we also need to test for AVX2 / AVX512BW for 256/512 bit vector cases.

llvm-svn: 263239
2016-03-11 14:39:10 +00:00
..
AArch64 AArch64: only try to use scaled fcvt ops on legal vector types. 2016-03-10 23:02:21 +00:00
AMDGPU [AMDGPU] Assembler: change v_madmk operands to have same order as mad. 2016-03-11 09:27:25 +00:00
ARM [ARM] Cortex-R8 support 2016-03-10 17:38:41 +00:00
BPF
CPP
Generic Move test/CodeGen/Generic/pr26652.ll to test/CodeGen/X86/pr26652.ll and test it only on X86. 2016-02-25 00:12:18 +00:00
Hexagon Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
Inputs
Mips [mips] MIPSR6 Instruction itineraries 2016-03-11 13:05:06 +00:00
MIR [MIR] Teach the parser/printer that generic virtual registers do not need a register class. 2016-03-08 01:17:03 +00:00
MSP430 MSP430InstrInfo::loadRegFromStackSlot forgets to set register def. 2016-02-24 15:15:02 +00:00
NVPTX [NVPTX] Use different, convergent MIs for convergent calls. 2016-03-01 19:24:03 +00:00
PowerPC [PPC] backend changes to generate xvabs[s,d]p and xvnabs[s,d]p instructions 2016-03-09 17:48:01 +00:00
SPARC Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
SystemZ [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
Thumb Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
Thumb2 ARM: Introduce conservative load/store optimization mode 2016-03-02 19:20:00 +00:00
WebAssembly [WebAssembly] Implement irreducible control flow. 2016-03-09 02:01:14 +00:00
WinEH [WinEH] Make setjmp work correctly with EH 2016-02-29 19:16:03 +00:00
X86 [X86][AVX] Fixed issue where a long chain of shuffles could attempt to combine to a single (illegal) PSHUFB instruction. 2016-03-11 14:39:10 +00:00
XCore [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00