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432f7965f4
The vast number of added instructions for SVE causes TableGen to fail with an assertion: Assertion `Delta < 65536U && "disassembler decoding table too large!"' This patch increases the number of supported decoder fix-ups. Reviewers: dmgreen, stoklund, petpav01 Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D48937 llvm-svn: 336334
45 lines
1.3 KiB
TableGen
45 lines
1.3 KiB
TableGen
// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
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include "llvm/Target/Target.td"
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def archInstrInfo : InstrInfo { }
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def arch : Target {
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let InstructionSet = archInstrInfo;
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}
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class TestInstruction : Instruction {
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let Size = 1;
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let OutOperandList = (outs);
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let InOperandList = (ins);
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field bits<8> Inst;
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field bits<8> SoftFail = 0;
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}
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def InstA : TestInstruction {
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let Inst = {0,0,0,0,?,?,?,?};
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let AsmString = "InstA";
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}
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def InstBOp : Operand<i32> {
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let DecoderMethod = "DecodeInstBOp";
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let hasCompleteDecoder = 0;
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}
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def InstB : TestInstruction {
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bits<2> op;
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let Inst{7-2} = {0,0,0,0,0,0};
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let Inst{1-0} = op;
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let OutOperandList = (outs InstBOp:$op);
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let AsmString = "InstB";
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}
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// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
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// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 16, 0, 0, // Skip to: 24
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// CHECK-NEXT: /* 8 */ MCD::OPC_CheckField, 2, 2, 0, 6, 0, 0, // Skip to: 21
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// CHECK-NEXT: /* 15 */ MCD::OPC_TryDecode, {{[0-9]+}}, 0, 0, 0, 0, // Opcode: InstB, skip to: 21
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// CHECK-NEXT: /* 21 */ MCD::OPC_Decode, {{[0-9]+}}, 1, // Opcode: InstA
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// CHECK-NEXT: /* 24 */ MCD::OPC_Fail,
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// CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }
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