1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/test/CodeGen/SystemZ/shift-11.ll
Elliot Colp 57a278afa3 Fix SystemZ compilation abort caused by negative AND mask
Normally, when an AND with a constant is lowered to NILL, the constant value is truncated to 16 bits. However, since r274066, ANDs whose results are used in a shift are caught by a different pattern that does not truncate. The instruction printer expects a 16-bit unsigned immediate operand for NILL, so this results in an abort.

This patch adds code to manually truncate the constant in this situation. The rest of the bits are then set, so we will detect a case for NILL "naturally" rather than using peephole optimizations.

Differential Revision: http://reviews.llvm.org/D21854

llvm-svn: 279105
2016-08-18 18:04:26 +00:00

86 lines
1.8 KiB
LLVM

; Test shortening of NILL to NILF when the result is used as a shift amount.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Test logical shift right.
define i32 @f1(i32 %a, i32 %sh) {
; CHECK-LABEL: f1:
; CHECK: nill %r3, 31
; CHECK: srl %r2, 0(%r3)
%and = and i32 %sh, 31
%shift = lshr i32 %a, %and
ret i32 %shift
}
; Test arithmetic shift right.
define i32 @f2(i32 %a, i32 %sh) {
; CHECK-LABEL: f2:
; CHECK: nill %r3, 31
; CHECK: sra %r2, 0(%r3)
%and = and i32 %sh, 31
%shift = ashr i32 %a, %and
ret i32 %shift
}
; Test shift left.
define i32 @f3(i32 %a, i32 %sh) {
; CHECK-LABEL: f3:
; CHECK: nill %r3, 31
; CHECK: sll %r2, 0(%r3)
%and = and i32 %sh, 31
%shift = shl i32 %a, %and
ret i32 %shift
}
; Test 64-bit logical shift right.
define i64 @f4(i64 %a, i64 %sh) {
; CHECK-LABEL: f4:
; CHECK: nill %r3, 31
; CHECK: srlg %r2, %r2, 0(%r3)
%and = and i64 %sh, 31
%shift = lshr i64 %a, %and
ret i64 %shift
}
; Test 64-bit arithmetic shift right.
define i64 @f5(i64 %a, i64 %sh) {
; CHECK-LABEL: f5:
; CHECK: nill %r3, 31
; CHECK: srag %r2, %r2, 0(%r3)
%and = and i64 %sh, 31
%shift = ashr i64 %a, %and
ret i64 %shift
}
; Test 64-bit shift left.
define i64 @f6(i64 %a, i64 %sh) {
; CHECK-LABEL: f6:
; CHECK: nill %r3, 31
; CHECK: sllg %r2, %r2, 0(%r3)
%and = and i64 %sh, 31
%shift = shl i64 %a, %and
ret i64 %shift
}
; Test shift with negative 32-bit value.
define i32 @f8(i32 %a, i32 %sh, i32 %test) {
; CHECK-LABEL: f8:
; CHECK: nill %r3, 65529
; CHECK: sll %r2, 0(%r3)
%and = and i32 %sh, -7
%shift = shl i32 %a, %and
ret i32 %shift
}
; Test shift with negative 64-bit value.
define i64 @f9(i64 %a, i64 %sh, i64 %test) {
; CHECK-LABEL: f9:
; CHECK: nill %r3, 65529
; CHECK: sllg %r2, %r2, 0(%r3)
%and = and i64 %sh, -7
%shift = shl i64 %a, %and
ret i64 %shift
}